Browse Prior Art Database

Dynamic Regrouping of Channel Time Slots in Data Communications

IP.com Disclosure Number: IPCOM000112887D
Original Publication Date: 1994-Jun-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Mandalia, BD: AUTHOR [+2]

Abstract

Described is a software implementation to provide dynamic regrouping non-contiguous or contiguous channel time slots as used in data communications. The dynamic regrouping of channel time slots is accomplished through the use of microcode, rather than random logic design so as to meet changes which may occur in bandwidth requirements, as used in multi-media applications.

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This is the abbreviated version, containing approximately 53% of the total text.

Dynamic Regrouping of Channel Time Slots in Data Communications

      Described is a software implementation to provide dynamic
regrouping non-contiguous or contiguous channel time slots as used in
data communications.  The dynamic regrouping of channel time slots is
accomplished through the use of microcode, rather than random logic
design so as to meet changes which may occur in bandwidth
requirements, as used in multi-media applications.

      In prior art, the regrouping of channel time slots were
available, based on hardware [*] approaches, where support was
available in fixed combinations, such as 64K bits per second (bps),
384K bps and as one data stream.  Fig. 1 shows a block diagram of the
memory and hardware interfacing that provided p*64/fractional T1/E1
data processing.  Block 10 was the T1 hardware that contained the
T1/E1 hardware that cycle-steals data into memory buffers for the
full T1/E1 1.536 Mbps/1.920 Mbps rate into 24/30 separate time slot
memory buffer 12 where each slot can carry 64 Kbps of data.  RISC
processor 11 was programmable to group different combinations of the
time slots into multiple data stream buffers 13.  Each buffer had an
aggregate rate of p*64 where p can be 1 to 24, except that the total
data rate of all the stream buffers could not exceed 1.536 Mbps for
T1 and 1.920 Mbps for E1.

      The concept described herein provides a means of implementing
the time-slot regrouping by utilizing microcode.  For each stream
d...