Browse Prior Art Database

Power Supply Sequencing Control Circuit

IP.com Disclosure Number: IPCOM000112961D
Original Publication Date: 1994-Jun-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 104K

Publishing Venue

IBM

Related People

Patterson, BE: AUTHOR

Abstract

Described is a hardware implementation to provide a sequencing control circuit for power supplies. The implementation provides control circuitry to prevent potential damage to system logic circuitry during the application or removal of different voltages, as used in low voltage computer systems.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Power Supply Sequencing Control Circuit

      Described is a hardware implementation to provide a sequencing
control circuit for power supplies.  The implementation provides
control circuitry to prevent potential damage to system logic
circuitry during the application or removal of different voltages, as
used in low voltage computer systems.

      In certain low voltage system configurations the mixture of low
voltage circuits can create potential damage to connected logic
circuitry during power-on and power-off operations.

      The concept described herein is designed to eliminate the
potential circuit damage by providing a method which sequences the
applied power supplies at both turn-on time and turn-off time.  This
sequencing of the applied voltage will then ensure that no damage
will occur to any logic circuits.

      The Figure shows the circuit representation of the sequencing
for +5 V and +3.3 V power supplies.  The sequencing circuit consists
of Field Effect Transistor (FET) Q1, bi-polar transistors Q2 and Q3,
resistors R1, R2 and R3, operational amplifiers ZM1 and ZM2 and
either a voltage comparator or an operational amplifier ZM3.  Bias
voltage Vcc represents a positive voltage, +5 V as an example, and
Vbb represents a negative voltage, -5 V as an example.  The Vref
designations are reference voltages for the operational amplifiers ZM
1 and ZM2 and comparator ZM3.  The Vref may be the same voltage
levels for all applications, or they may be varied according to
function.

      It is assumed that the power supplies contain an internal
voltage source which has a short turn-on time that is constant
relative to the main power supply, or is always present to generate
the bias voltages Vcc and Vbb, as well as the reference voltages
Vref.  In the Vref case, it is assumed that the power supply outputs
are controlled by an on/off signal into a power supply control
circuit.

      In the Figure, blocks labeled AC sense and 3.3 V sense are
sense circuits for the power supply AC input voltage and the 3.3 V
output level.  If the power supply is the type where the main outputs
are controlled by way of an on/off input signal to the power supply
control circuits, the AC sense circuit block is replaced by the
control circuit on/off signal.  In this case, some of the polarities
of the operational amplifiers and comparator may have to be reversed,
depending on the application.  The methods used to sense the AC
input, or to generate the on/off signal and the 3.3 V output level
are not a part of this disclosure.

      The sequence control circuit functions in three modes: Normal
St...