Browse Prior Art Database

Toleration of Errors in VLSI Processors

IP.com Disclosure Number: IPCOM000112979D
Original Publication Date: 1994-Jun-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Doettling, G: AUTHOR [+4]

Abstract

Described is a circuit which allows the recognition of errors occurring during the execution of instructions (so-called op codes) in a processor and a means for circumventing the errors. This is achieved by setting a comparison register with a certain predetermined value and continually comparing this value with the op codes being executed in the processor. Should the processor be able to operate in various modes, such as the execution of machine or microprogram instruction or forced operations, then the type of mode in which the processor is operating will also be stored in a register. On recognition of a match between the stored values and the currently executing op code and mode, then a match signal will be produced. Using a second comparison register as shown in Fig.

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Toleration of Errors in VLSI Processors

      Described is a circuit which allows the recognition of errors
occurring during the execution of instructions (so-called op codes)
in a processor and a means for circumventing the errors.  This is
achieved by setting a comparison register with a certain
predetermined value and continually comparing this value with the op
codes being executed in the processor.  Should the processor be able
to operate in various modes, such as the execution of machine or
microprogram instruction or forced operations, then the type of mode
in which the processor is operating will also be stored in a
register.  On recognition of a match between the stored values and
the currently executing op code and mode, then a match signal will be
produced.  Using a second comparison register as shown in Fig. 1, a
further predetermined value can be stored so that the sequence of op
codes can be compared and a match signal produced if the sequence
matches.  A "valid" bit determines whether the comparison is made
with either the first or the second comparison register or whether
both registers are used to match the sequence of operations.

      Besides the comparison registers, a bit mask register of the
same width is incorporated into the circuit as is also shown on Fig.
1.  The bit mask register is used to filter out certain groups of op
codes or, if it is set to null, to switch off the comparison.  The
comparator circuit as shown in Fig. 2 and described in this article
is found several times on the processor chip and can be...