Browse Prior Art Database

Memory Protection Architecture for Real-Time Applications

IP.com Disclosure Number: IPCOM000113054D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 129K

Publishing Venue

IBM

Related People

Ackerman, JE: AUTHOR [+4]

Abstract

Described is an architectural implementation to provide memory protection logic circuitry for real-time applications, such as used in Personal Computers (PCs). The implementation involves the use of a memory controller designed to operate in conjunction with high performance micro processor.

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This is the abbreviated version, containing approximately 46% of the total text.

Memory Protection Architecture for Real-Time Applications

      Described is an architectural implementation to provide memory
protection logic circuitry for real-time applications, such as used
in Personal Computers (PCs).  The implementation involves the use of
a memory controller designed to operate in conjunction with high
performance micro processor.

      In prior art, memory protection was configured for various
memory devices by using page boundary techniques.  The concept
described herein provides memory protection by using cache protection
tables and uses the Intel 80960* types of microprocessors as an
example for the implementation.

      Typically, in multi-user PC systems, memory protection is used
extensively to prevent an application from corrupting either the
system or other applications.  As a result of its extensive use,
microprocessor manufacturers offer microprocessors with built-in
memory protection features.  For example, the Intel 80286 provides
protection within a segmented addressing environment.  The Intel
80386 and the Intel 80486 offered supporting built-in memory
protection within a segmented and a paged addressing environment.
Real-time systems, unlike multi-user environments, usually do not use
memory protection since they normally involve a single application
requiring several cooperating software processes.  If any process
becomes corrupted, the whole application fails.  However, as
real-time applications become more complex, they more closely
resemble multi-user environments where the process has the same
ability to corrupt other processes and their environment.  Therefore,
real-time applications increasingly require memory protection so as
to allow identification of a process reading or writing outside of
its assigned memory area.

      Microprocessors that do not offer memory protection lack
certain features necessary for real-time embedded applications, such
as:  fast interrupt response; bit manipulation; and atomic
instructions.  Conversely, microprocessors suited for real-time
applications, or embedded control microprocessors do not offer memory
protection.  Memory protection is not available on certain
microprocessors, such as the Intel 80960CA.

      The concept described herein provides a means of having memory
protection available external to the microprocessor, such as the
Intel 80960CA.  The memory protection is imbedded in a memory
controller chip and offers protection for other external bus masters.
It offers write only protection and is particularly useful when
interfacing to external Direct Memory Access (DMA) controllers and
does not distinguish between user and supervisor modes of operation.

      In keeping with the high performance aspects of the
microprocessor, the concept minimizes the impact on performance while
still affording a useful level of protection.  Fig. 1 shows a block
diagram of the page table format, as used in the Intel 80960CA.  I...