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Browse Prior Art Database

Selector Mapping Table

IP.com Disclosure Number: IPCOM000113063D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 6 page(s) / 173K

Publishing Venue

IBM

Related People

Dobbelstein, SL: AUTHOR [+2]

Abstract

The Dual Processor Server makes use of an additional CPU installed in the machine to increase performance. The additional CPU is provided on an adapter card installed in the machine. Several pieces of the LAN Server are off-loaded to the peripheral processor, namely the File System, the Ring 0 File Server and the Protocol Stack. This is diagrammed in Fig. 1. Off-loading these pieces improves performance in two ways. First, loading these pieces on the peripheral processor allows them to run in parallel with the remainder of the operating system that is loaded on the planar processor. This means that disk requests or network activity can be handled at the same time as applications that are running on the planar processor.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 42% of the total text.

Selector Mapping Table

      The Dual Processor Server makes use of an additional CPU
installed in the machine to increase performance.  The additional CPU
is provided on an adapter card installed in the machine.  Several
pieces of the LAN Server are off-loaded to the peripheral processor,
namely the File System, the Ring 0 File Server and the Protocol
Stack.  This is diagrammed in Fig. 1.  Off-loading these pieces
improves performance in two ways.  First, loading these pieces on the
peripheral processor allows them to run in parallel with the
remainder of the operating system that is loaded on the planar
processor.  This means that disk requests or network activity can be
handled at the same time as applications that are running on the
planar processor.  Second, off-loading these components frees up CPU
cycles on the planar so that it can do other work, such as run the
Data Base.

      Each processor has a different mapping of system memory.  This
is diagrammed in Fig. 2.  The planar processor sees its own memory
starting at address zero.  It sees the memory on the peripheral
processor as starting at the end of planar processor memory.  The
peripheral processor sees things in reverse.  It sees its own memory
starting at address zero and the planar processor memory starting at
the end of peripheral processor memory.  Thus, a physical address on
one processor does not correspond to the same memory location if it
is used on the other processor.  Part of the new code for the Dual
Processor is to develop an inter-processor interface for the 802.2
protocol.  Part of that interface is to translate addresses that are
valid on the planar processor to addresses that are valid on the
peripheral processor.  In the simple scheme of things translating a
virtual address that is valid on the planar processor to a virtual
address that is valid on the peripheral processor requires only three
steps.

1.  Convert the planar processor virtual address to a physical
    address.

2.  Convert the physical address to its corresponding physical
    address on the peripheral processor.

3.  Convert the physical address to a virtual address that is valid
    on the peripheral processor.

      The last step is usually done by calling the DevHelp
PhysToGDTSelector function.  However, in our case things are too
complicated to use the simple case.  Many buffers in 802.2 are used
over and over again.  If we were to issue a PhysToGDTSelector every
time we passed a buffer over to the peripheral processor we would run
out of GDT selectors very quickly.  And calling PhysToGDTSelector for
every pointer can slow down the system.  In addition, many places in
the 802.2 CCB3 interface rely on offsets alone for accessing data.
The selector is assumed from some other pointer.  If we were to
convert the planar processor address to a physical address and then
to an peripheral processor address, the offsets might get screwed up.
That is to sa...