Browse Prior Art Database

Signal Handler Facility to Present a Standard Interface for Floating-Point Trap Mode

IP.com Disclosure Number: IPCOM000113084D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 60K

Publishing Venue

IBM

Related People

Linam, SD: AUTHOR [+2]

Abstract

A method is disclosed to present consistent and intuitive interfaces to a signal handler which must interpret or modify parts of the interrupted process.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Signal Handler Facility to Present a Standard Interface for Floating-Point
Trap Mode

      A method is disclosed to present consistent and intuitive
interfaces to a signal handler which must interpret or modify parts
of the interrupted process.

      The RISC System/6000* and PowerPC* hardware have a
floating-point trap mode, which controls if floating-point exceptions
will generate precise or imprecise traps or no traps at all.  Bits in
the Machine Status Register (MSR) control which mode is in effect.
Not all modes are implemented on all platforms.

      A signal handler is a user subroutine that is run when certain
interrupts occur.  A user can create a signal handler subroutine
which will run when a floating-point exception trap occurs.

      The information presented to a signal handler subroutine
includes the state of the hardware at the time the trap was taken,
which can be used to diagnose the cause of the trap.  Also, the
signal handler subroutine can modify much of this hardware state and
continue execution from that point.  The MSR is part of the
information so presented.

      Users of the RISC System/6000 and PowerPC systems know about
the bits in the MSR which control the floating-point trap mode, and
would properly expect the MSR to reflect the floating-point trap mode
in effect at the time of the trap, and to be able to modify that mode
by changing the appropriate bits in the MSR.  However, as described
in (*), the floating-point trap mode is "logically" stored somewhere
other tha...