Browse Prior Art Database

Media Controller for Receiving Data from a Taxi Link

IP.com Disclosure Number: IPCOM000113150D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 183K

Publishing Venue

IBM

Related People

Stauffer, DR: AUTHOR [+2]

Abstract

A TAXI* Media Controller (TMC) circuit is employed with a commercially available TAXI Receive Chip to provide an interface between the receive chip and a memory system to monitor/verify data originating from a TAXI data transmitter. The TMC synchronizes data to the local clock source using a FIFO queue controlled by a Media Control State Machine (MCSM). The MCSM supports the packet mode and bitstream mode low-level protocols and drives signals to control the data flow into the memory system. The TMC also includes a Gap Insertion Circuit which guarantees a minimum packet separation such that the buffer memory management hardware has sufficient time to perform queue management.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 32% of the total text.

Media Controller for Receiving Data from a Taxi Link

      A TAXI* Media Controller (TMC) circuit is employed with a
commercially available TAXI Receive Chip to provide an interface
between the receive chip and a memory system to monitor/verify data
originating from a TAXI data transmitter.  The TMC synchronizes data
to the local clock source using a FIFO queue controlled by a Media
Control State Machine (MCSM).  The MCSM supports the packet mode and
bitstream mode low-level protocols and drives signals to control the
data flow into the memory system.  The TMC also includes a Gap
Insertion Circuit which guarantees a minimum packet separation such
that the buffer memory management hardware has sufficient time to
perform queue management.  The TMC status register and associated
logic detect incomplete data packets, packets received too close
together and command symbols not defined by the low-level protocol.

      The Transparent Asynchronous Xmitter/receiver Interface (TAXI)
chipset provides a unidirectional high-speed serial data link at the
physical layer.  The TAXI Test Adapter uses the TMC with this chipset
to provide a means of monitoring data originating from a system which
transmits TAXI data.

      As shown in the Figure, the TMC described in this disclosure
provides an interface between the output of a TAXI Receive Chip and
the input of a memory system.  To support this configuration, the TMC
must perform the functions listed below:

o   buffering/synchronization of data to the local clock source;

o   implementation of a Media Control state machine which supports
    two typical low-level protocols; and

o   insertion of additional gaps between packets of data received too
    close together in order to allow the memory system to perform
    queue management without loss of data.

      Additionally, the TMC must detect off-nominal events in order
to support its intended use in test equipment:

o   detection of data packets with no end delimiter;

o   detection of packets received too close together; and

o   detection of command symbols not defined by the low-level
    protocol.

      The Node Processor Data Bus interface shown in figure provides
an on-card processor with the ability to access control/status
information provided by the TMC.

      A block diagram of the TMC is shown in the Figure.  This
circuit is designed to support two low-level protocols that are
commonly used by TAXI data links in commercial products.  In packet
mode, the transmit source encapsulates packets of data between a
start delimiter and an end delimiter.  The TMC circuit is easily
modified to use any set of command symbols in these roles.  As is the
case with all TAXI data links, the 'JK' sync symbol is inserted as
filler between packets (and also, if needed, within a packet) to
maintain a continuous 100 Mb/s serial data stream.  In bitstream
mode, the transmit source transmits data as available w...