Browse Prior Art Database

Timer Control of Graphic Macro Local Bus

IP.com Disclosure Number: IPCOM000113243D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Lam, SH: AUTHOR

Abstract

Described is a hardware implementation to enable a timer to control the local bus clock operation of a graphic macro. The implementation provides a power management idle timer to control the local bus interface clock, as used in personnal computers.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 66% of the total text.

Timer Control of Graphic Macro Local Bus

      Described is a hardware implementation to enable a timer to
control the local bus clock operation of a graphic macro.  The
implementation provides a power management idle timer to control the
local bus interface clock, as used in personnal computers.

      Typically, a graphics macro integrated circuit chip is divided
into five sub-macros, as follows:  1) Co-processor; 2) Bus
Controller; 3) Memory Controller; 4) CRT Controller; and 5) Serial
Parallel Interface.  In prior art, if a sub-macro was detected as
being idle, its clock circuit would be gated OFF and the clock would
be turned ON when requested for be gated OFF and the clock would be
turned ON when  requested for service.  As a result, clock cycles
were wasted whenever a sub-macro was activated due to the request
first reached from a power management state machine.  The state
machine at the next clock cycle.  This clock shutdown would cause
unnecessary operational delays.

      For internal logic interface circuitry, the clock shutdown
request may be termed as looked-ahead so that clock cycles would not
be wasted.  However, with an external logic interface, such as the
local bus, a look-ahead request is not available such that one clock
is added for every waked-up system bus cycle.

      The concept described herein reduces the clock operational
penalty of the prior art.  An eight bit idle timer is added to keep
track of how long the bus contr...