Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Post Support for Manufacturing Medialess Machines

IP.com Disclosure Number: IPCOM000113249D
Original Publication Date: 1994-Jul-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 171K

Publishing Venue

IBM

Related People

Grimes, BR: AUTHOR

Abstract

Disclosed is the modification of the Stage II Power-On Self Test (POST) process to allow this process to be executed repeatedly in the "run-in" environment of a manufacturing process, and to allow a manufacturing diagnostics program, executed following Stage II POST during the process of manufacturing a system, to be downloaded through the parallel port of the system.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 37% of the total text.

Post Support for Manufacturing Medialess Machines

      Disclosed is the modification of the Stage II Power-On Self
Test (POST) process to allow this process to be executed repeatedly
in the "run-in" environment of a manufacturing process, and to allow
a manufacturing diagnostics program, executed following Stage II POST
during the process of manufacturing a system, to be downloaded
through the parallel port of the system.

      In IBM PS/2* computer systems, POST code is executed in Stage I
and Stage II processes, with the minimal functions of the system
being tested and initialized during Stage I, as required to load
Stage II.  When the Stage II is successfully completed, the system
has been tested and initialized to a point at which the Initial
Program Load of the system can proceed.

      Fig. 1 is a block diagram of Stage I POST code being executed
after the start of this test in block 10, with certain minimal system
functions being tested in block 11.  During the process of
manufacturing a PS/2 system, the manufacturing line needs to be able
to gain control of the system so that testing applied to the system
can be more intensive than the testing done by POST.  To allow
manufacturing to halt the execution of POST code and to gain control
of the test process, "hooks," which can be accessed through the
parallel port, are provided in the POST code.  Thus, if Manufacturing
Boot Request is received in block 12, the MFG_BRQ flag is set in
block 14.  If this request is not received, this flag is reset in
block 16, in case it has been previously set.  After additional
testing and initialization in block 18, this flag is checked in block
20 to determine if a Manufacturing Boot Request has been received.
If this request has been received, manufacturing code is downloaded
by means of the parallel port in block 22, and control is passed to
this code in block 24.  If this request has not been received, the
code for Stage II POST is loaded in block 26.

      If the manufacturing code has been loaded, various registers,
various RAM memory locations, and various non-volatile memory
locations in the system are initialized to verify the functionality
of the system.  Once this environment has been set up by
manufacturing, control of the system is passed back to system POST,
so that the Stage II process can begin.

      Fig. 2 is a block diagram of conventional Stage II POST code
being executed after being started in block 28, with various
functions being initialized and tested in block 30.  In block 32, the
keyboard and mouse are tested, and in block 34 more functions are
initialized and tested.  At the end of the execution of Stage II
POST, in block 36, the IPL (Initial Program Load) process is begun.
In the IPL process, the first sector of the diskette drive in the
system is read.  If there is no diskette in the diskette drive, the
system proceeds to other media, reading, for example, the first
sector of the hardfile....