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Browse Prior Art Database

Low-Cost Chip Carrier

IP.com Disclosure Number: IPCOM000113270D
Original Publication Date: 1994-Aug-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Goodman, DS: AUTHOR [+3]

Abstract

Disclosed is a low cost IC package in which the inner and outer lead bonds, and associated circuitry are fabricated directly on a three-dimensional substrate, reducing the limitations associated with conventional packages that use conventional leadframe construction.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Low-Cost Chip Carrier

      Disclosed is a low cost IC package in which the inner and outer
lead bonds, and associated circuitry are fabricated directly on a
three-dimensional substrate, reducing the limitations  associated
with conventional packages that use conventional leadframe
construction.

      In the design (1) and (2), a base (3) is fabricated of plastic,
ceramic, dielectric-coated metal, etc. to carry the circuitry (4);
other features such as recesses to contain the chip (5), multi-level
inner-lead-bond pads (6), heatsinks (7), locating and retention
features (8) may be added.  Circuitry is fabricated directly on this
substrate using various processes available for imaging nonplanar
surfaces; appropriate metallurgy is deposited for inner and outer
lead bonds.  Chips are subsequently attached by wire-bonding, C-4
etc., and the chip cavity backfilled with  a protective overcoat or
cap.