Browse Prior Art Database

Minimum-Component Digital Very Large Scale Integration Game Adapter Interface

IP.com Disclosure Number: IPCOM000113344D
Original Publication Date: 1994-Aug-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 140K

Publishing Venue

IBM

Related People

Drabenstott, TL: AUTHOR [+3]

Abstract

Game, or joystick, interfaces are widely used in multimedia applications. These interfaces are typically implemented using discrete components as shown in Fig. 1. This drawing illustrates a standard dual-joystick interface (two axes, X and Y, plus two buttons per joystick).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 46% of the total text.

Minimum-Component Digital Very Large Scale Integration Game Adapter
Interface

      Game, or joystick, interfaces are widely used in multimedia
applications.  These interfaces are typically implemented using
discrete components as shown in Fig. 1.  This drawing illustrates a
standard dual-joystick interface (two axes, X and Y, plus two buttons
per joystick).

The interface operates as follows:

1.  The decode/control logic (typically implemented in a PAL) decodes
    a write to I/O address 201 on the PC system bus and sends a
    negative-going trigger signal to the 558 timer package (quad 555
    timer).

2.  Each of the timers activates on the trigger, and produces a pulse
    width proportional to the RC time constant of the circuit
    attached to the timer.  The R in this circuit is actually the
    current value of the potentiometer in the physical joystick unit.

3.  Signal lines carrying the timer output pulses together with
    signals indicating the state of the joystick buttons are combined
    and fed to a bus buffer.

4.  The decode/control logic decodes reads to address 201 and gates
    the stick/button signal line data onto the PC system bus data
    lines as an eight bit register value.

5.  The PC application software polls address 201 for enough time to
    measure the pulse width, providing information on stick position
    and button status.

      The discrete component cost of this approach can be as high as
several (1993) dollars, but this is still the correct approach for
designers building interfaces into systems using only generally
available (commodity) chips.  Recently multimedia system designers
have been incorporating high pin and device count Very Large Scale
Integration (VLSI) chips into their designs.  In many cases they have
control over some or all of the VLSI chip design (i.e., the chip is
an application specific integrated circuit or ASIC) and have
attempted to "sweep" as many discrete components as possible into the
ASIC for purposes of component bill of materials and physical design
size cost reduction activity.

      A typical "sweep" of joystick function into a VLSI package
incorporates the function of the bus buffer and address
decode/control logic in Fig. 1 but not the 558 timer.  Unless
multiplexed (requiring additional off-chip logic to demultiplex),
this requires nine pins on the VLSI package (one trigger, eight
signal).  The resulting solution does not eliminate all significant
external components and is costly in terms of scarce VLSI package
pins.

      We propose a solution which allows a VLSI "sweep" of the
interface that eliminates all external active components and requires
only five VLSI package pins.

      The solution employs the circuit shown in Fig. 2.  Note that
the only external components (other than the potentiometers in the
standard joystick) are eight small-signal diodes and a capacitor.

      Again, the obje...