Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Force Purge Table for Memory Directory in Directory Based Symmetric Multiprocessor Systems

IP.com Disclosure Number: IPCOM000113377D
Original Publication Date: 1994-Aug-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 109K

Publishing Venue

IBM

Related People

Cheng, K: AUTHOR [+5]

Abstract

Contribution: An Approach to remove inclusion bits for directory force purge operations.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Force Purge Table for Memory Directory in Directory Based Symmetric
Multiprocessor Systems

      Contribution: An Approach to remove inclusion bits for
directory force purge operations.

      In a directory based Symmetric Multi Processor (SMP) SMP
system, when a coherence request in the request queue is ready to be
served, the memory directory will be searched.  If the corresponding
entry is not in the memory directory and the congruent class of the
address is full, an entry in the memory directory must be replaced,
and all valid L2 cache lines associated with the entry have to be
invalidated because the memory directory is the super-set of that of
all L2 caches.  In order to enhance the system performance, we
disclose a separate table, called Force Purge Table, to store the
information of the entries being replaced so that the force purge
operations will be done in the background and the request which
generated the force purge will not be delayed.

      There are n entries in the Force Purge Table, e.g., if n=16, up
to 16 outstanding replaced entries may exist simultaneously.  Once
the table is full, all low priority memory directory accesses will be
disabled.  The content of each entry is listed in Table 1.  The five
fields in each entry are:

o   VF, Valid bit: When VF=1, the entry is in use; otherwise, the
    entry is free.

o   Purge Tag, Physical Address Tag: the address tag of the line
    being purged; it is copied from memory directory and congruent
    class address is copied from processing request.

o   E, one exclusive bit per sector in a line: the exclusive bits are
    copied from memory directory.  They are kept so that incoming
    Store Through/Cast Out from any L2 to the line can be validated.
    When the inclusion bit is set but the E bit of the corresponding
    sector of the incoming Store Through/Cast Out is not set, an
    error of an invalid Write is reported to the service processor of
    the SMP system.

o   Purge Inclusion L2: one for each L2; the Bellatrix SCU L2
    directory controller only has the line concept when it receives
    the Force Purge command.  Thus, we do an OR operation of the
    purge inclusion bits with the 4 sectors, and save them in the
    Purge Inclusion L2 bits.

o   Purge Inclusion IO: four for each IO; the Bellatrix SCU IO
    controller only has the sector concept when it receives any
    related command.  Thus, we have to copy the inclusion bits from
    memory directory to Purge Inclusion IO bits sector by sector.
    (See Table 1)

      Purge Inclusion L2 and Purge Inclusion IO fields - Why is there
a need to se...