Browse Prior Art Database

Multiplier Performing Two's-complement, Unsigned and Signed-unsigned Multiplication

IP.com Disclosure Number: IPCOM000113437D
Original Publication Date: 1994-Aug-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 107K

Publishing Venue

IBM

Related People

Putrino, M: AUTHOR

Abstract

A multiplier can be built incorporating (1,2).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Multiplier Performing Two's-complement, Unsigned and Signed-unsigned
Multiplication

      A multiplier can be built incorporating (1,2).

      Such a multiplier would be able to multiply two unsigned
numbers together to produce an unsigned product, or two
two's-complement numbers to produce a two's-complement multiplier
with an unsigned multiplicand to produce a two's-complement product.

      The present disclosure modifies the multiply hardware of the
above patents to enable it to multiply a two's-complement multiplier
with an unsigned multiplicand to produce a two's-complement product.

      Boothe encoding with three-bit overlapped scanning is used to
form the partial-products that are added with any known technique,
(block 40 of Fig. 1) such as a custom matrix of three-to-two counters
or a Walace tree of adders, followed by a full-adder to yield the
product.

      Only minor modifications are required to the Sign-encode and
Boothe Control Signal generation logic (blocks 10 and 20 of Fig. 1)
for the conversion to be incorporated.

      For a multiplier design incorporating (1,2), the sign-encode
bits (S-bit) concatenated on the partial-products are derived from
the sign of the Boothe coefficient logically exclusive-ORed with the
sign bit of the multiplicand.  The S-bit is a logical "1" for
positive partial-products and a logical "O" for negative partial
products, as described in (1,2).

      Because the sign of the multiplicand of the present invention
is always positive for a combination signed-unsigned mode of
operation, the new sign-encode bits produced by the Sign-encode
generation logic (10) for this mode are equivalent to the sign of the
Boothe coefficient.  Therefore, the high-order bit of the
multiplicand feeding the sign-encode generation logic is gated (or
blocked from reaching the exclusive_OR) by a "signed-unsigned"
control signal when operating in this mode.

      Therefore, it can be seen that the sign-encode bits for the
signed-unsigned mode of operation are the same as those for the
sta...