Browse Prior Art Database

Input/Output Optimized RISC Microcontroller

IP.com Disclosure Number: IPCOM000113504D
Original Publication Date: 1994-Aug-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Blevins, BJ: AUTHOR [+2]

Abstract

A Method of Performing Input/Output (I/O) operations at normal speeds of discrete logic with the flexibility and programmability of a microprocessor. I/O functions are distributed between central execution and multiple Input/Output Logic Units (IOLUs).

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This is the abbreviated version, containing approximately 88% of the total text.

Input/Output Optimized RISC Microcontroller

      A Method of Performing Input/Output (I/O) operations at normal
speeds of discrete logic with the flexibility and programmability of
a microprocessor.  I/O functions are distributed between central
execution and multiple Input/Output Logic Units (IOLUs).

      Traditional I/O processors require a great deal of support from
central processing elements in order to manage I/O transfers in order
to increase performance of computing systems some way of reducing
this overhead must be achieved.  Traditional methods of offloading
processor overhead utilized simple slow processors with centralized
handling of I/O operations.  The method described here improves upon
this method by distributing independent I/O Logic Units (IOLU) under
the control of a simple stack oriented processor.

      The processor relies on a Harvard architecture to improve
instruction and data bandwidth.  A small stack oriented execution
unit is used to control the IOLUs and to manage transfers.  IOLUs are
composed of hardware which can independently execute instructions
which transfer data and perform logic functions on the data.
Registers within the IOLUs, are used to indicate which logic and
transfer functions are performed and which bits are masked from the
logical or transfer operations.  the target of the IOLU can be
another IOLU or the central data store.

      By organizing the execution of I/O instructions in this way the
I/O pro...