Browse Prior Art Database

Enhanced Memory Error Handling Method for Personal Computers

IP.com Disclosure Number: IPCOM000113560D
Original Publication Date: 1994-Sep-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 188K

Publishing Venue

IBM

Related People

Eaton, SP: AUTHOR [+3]

Abstract

Described is an architectural implementation to enhance the performance of Personal Computers (PCs) where user induced errors can become involved. The technique provides a number of tests regarding channel memory circuitry so that error messages can be displayed, such as non-contiguous and overlapping channel memory tests and implementation.

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This is the abbreviated version, containing approximately 32% of the total text.

Enhanced Memory Error Handling Method for Personal Computers

      Described is an architectural implementation to enhance the
performance of Personal Computers (PCs) where user induced errors can
become involved.  The technique provides a number of tests regarding
channel memory circuitry so that error messages can be displayed,
such as non-contiguous and overlapping channel memory tests and
implementation.

      Typically, there are two types of memory installed in certain
PCs:  Single In-line Memory Modules (SIMMs) and channel memories.
The SIMMs are configured during the Power-On Self Test (POST)
operations.  The channel memory, or adapter memory, is configured by
the user by means of switch settings on an adapter card.  The proper
way to set up the memory is to have it set up linearly with no
overlap, or gaps, in the system's memory space.  (The concept uses
the terms SIMMs and planar memory interchangeably).  Also,
interchangeable are the terms channel memory and adapter memory.  The
system memory is the total memory that the operating system
recognizes and is made up of both SIMMs and channel memories.

      Typically, the Disk Operating System (DOS) has the addressing
power to use the memory from 0 to 640KB.  Memory in the 640KB to 1MB
address range cannot be addressed as system memory because it is
blocked by the PC.  Physical memory in this area can be remapped to
the end of all other memory by means of the POST.  Fig. 1 shows a
block diagram of the system's memory space where memory can be
addressed up to 16MB.

      The memory is set up by POST as follows: First SIMMs, then the
slower channel memory.  Fig. 2 shows a block diagram of a configured
SIMM and channel memory.  For example, if there are 2MB of SIMMs and
2MB of channel memory, the memory configuration would appear as shown
in Fig. 2.  POST would automatically find the 2MB of SIMMs and
configure it.  The user would have to set the switches on the channel
memory card to make it's beginning address 2MB.  This would make the
system memory, SIMMs plus channel memory, contiguous and
non-overlapping.  POST would then remap the memory physically
addressed between 640KB and 1MB to the end of system memory, making
system memory slightly larger.  This remapped memory is called split
memory and is 384KB in size.  As shown in Fig. 2, SIMM memory would
go from 0 to 2MB, followed contiguously by the channel memory from
2MB plus 1 byte to 4MB, followed by the remapped SIMM memory from 4MB
plus 1 byte to 4MB plus 384KB.  The problem needing to be solved is
when the user sets the memory address switched on the channel memory
card to either overlap SIMM memory, addressed to less than 2MB, or be
non-contiguous with SIMM memory, addressed higher than 2MB.  In
either case, the memory would not be used by the operating system.

The following is a description of the non-contiguous and overlapping
channel memory test:

o   If a channel memory card in a fami...