Browse Prior Art Database

Automatic Programmed Input/Output Function for Personal Computers

IP.com Disclosure Number: IPCOM000113583D
Original Publication Date: 1994-Sep-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 4 page(s) / 164K

Publishing Venue

IBM

Related People

Cook, DC: AUTHOR [+5]

Abstract

Described is a software implementation to provide an Automatic Programmed Input/Output (APIO) function for Personal Computers (PCs). The software is designed to increase the throughput on the Small Computer System Interface (SCSI) bus by reducing the number of instructions and their associated latency.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 35% of the total text.

Automatic Programmed Input/Output Function for Personal Computers

      Described is a software implementation to provide an Automatic
Programmed Input/Output (APIO) function for Personal Computers (PCs).
The software is designed to increase the throughput on the Small
Computer System Interface (SCSI) bus by reducing the number of
instructions and their associated latency.

      The APIO operations involve the transfer of message and command
data across the SCSI bus and consist of four functions: 1) Initiator
Mode Outbound (IMO) to the SCSI device; 2) Initiator Mode Inbound
(IMI) from the SCSI device; 3) Target Mode Outbound (TMO) to the SCSI
device; and 4) Target Mode Inbound (TMI) from the SCSI device.

The IMO function to the SCSI device:

To send a byte of information to a target, the APIO function must be
programmed as follows:
  1.  Load the data to be sent into the SCSI data register (h'12').
  2.  Set the APIO expected phase bits (h'14') to the phase expected
      from the target and enable the APIO function by setting the
APIO
      start bit in the APIO control register (h'14').  If this byte
is
      the last byte of a message out phase, the reset ATN must also
be
      set for the state machine to reset ATN at the proper moment.
  3.  The state machine will monitor the SCSI bus and wait for REQ to
      be active.  Once REQ is active, the actual phase will be
compared
      to the expected phase.  If the expected phase is correct, the
ACK
      will be activated.  If the reset ATN was set, the ATN signal
      would have automatically reset prior to activating ACK.
  4.  ACK will remain active until REQ becomes inactive.  At this
      point, the APIO data ready bit will be set and an interrupt
will
      be posted.

    If another byte of data is to be sent, continue as follows:
  5.  Load the next byte into the SCSI data register (h'12').
  6.  If the expected phase is different from the previous phase, set
      the expected phase bits to the new phase.
  7.  Tell the APIO state machine to proceed by writing any value to
      the SCSI latch data register (h'10').
  8.  The logic will perform another SCSI handshake, the data ready
bit
      will be set again and another interrupt will be posted.
  9.  Repeat steps #5 through #8 until all of the data has been sent.
 10. The APIO operation can be terminated by resetting the APIO start
     bit.  The interrupt and the APIO data ready bits are set by
     writing any value to the SCSI latch data register (h'10').

      If the actual phase does not match the expected phase, the
handshake will not be performed, the phase mismatch bit (h'14') will
be set and an interrupt will be posted.  The phase mismatch bit and
the interrupt can be reset by writing any value to the latch data
register (h'10').  The expected phase bits can be changed to the
correct phase and the APIO f...