Browse Prior Art Database

Method to Aid Migration of POWER Assembly Source Code to PowerPC

IP.com Disclosure Number: IPCOM000113699D
Original Publication Date: 1994-Sep-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 97K

Publishing Venue

IBM

Related People

Chibib, AC: AUTHOR [+4]

Abstract

The PowerPC* architecture is derived from the POWER* architecture. Although they share a large number of the instructions, there do exist incompatibilities between these two architectures. In certain cases, run time errors, i.e., illegal instruction errors, could occur even if the source program is successfully assembled and linked. It is often difficult for a user to determine the cause of any illegal instruction interrupt since there could be many reasons to cause this interrupt. In even worse situations, the incompatibility errors could cause a silent failure! The program execution gets an unexpected result and the user is not aware of it. Catching the incompatibility error at assembly time instead of execution time is a definite need for assembly language programmers.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Method to Aid Migration of POWER Assembly Source Code to PowerPC

      The PowerPC* architecture is derived from the POWER*
architecture.  Although they share a large number of the
instructions,  there do exist incompatibilities between these two
architectures.  In certain cases,  run time errors, i.e., illegal
instruction errors, could occur even if the source program is
successfully assembled and linked.  It is often  difficult for a user
to determine the cause of any illegal instruction interrupt  since
there could be many  reasons to cause this interrupt.  In even worse
situations, the incompatibility errors could cause a silent failure!
The program execution gets an unexpected result and the user is not
aware of it.  Catching the incompatibility error at  assembly time
instead of execution time is a definite need for assembly language
programmers.

The incompatibilities  fall into the following two categories:
  1.  Some POWER instructions are not supported in PowerPC.
  2.  Certain restrictions are required in the PowerPC architecture
but
      are not required in the POWER architecture.  A result is that
      existing source programs contain so called "invalid instruction
      forms" for PowerPC.  An instruction form is invalid if one  or
      more fields of the instruction, excluding the opcode field, are
      coded incorrectly.  Executing an invalid form of an instruction
      will either cause an illegal instruction interrupt or yield
      undefined results.

      To catch the unsupported instruction errors, in Pass 1 of the
assembling process, each instruction's bit map is compared with the
target environment to ensure that the instruction is supported in the
specified environment.  If some unsupported instructions are found in
Pass 1, the assembling is terminated with the error reported in the
assembler listing indicating that the specific instructions are not
implemented in the current assembly mode.  Each assembly mode defines
its supported instructions range.  By removing the unsupported
instructions from the source program for the target environment
according to the assembly errors reported, the user can easily
achieve the goal to migrate an existing POWER source program to
different architectures or implementation platforms.

      In Pass 2 of the assembling process, each input operand is
further checked and converted properly to generate the object code.
This is when to catch the "invalid instruction form" error.   One
kind of invalid forms checking can be done statically by examing the
instruction format for the bit patterns, i.e., some reserved fields
are required to h...