Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Simple Method to Aid in Debugging Programs which Misuse POWER-PC Atomic Primitives

IP.com Disclosure Number: IPCOM000113715D
Original Publication Date: 1994-Sep-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Rogers, MD: AUTHOR [+2]

Abstract

Disclosed is a method to force application programs which use POWER-PC atomic operations to loop instead of getting undefined results upon referencing misaligned data. This aids in debugging such programs.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Simple Method to Aid in Debugging Programs which Misuse POWER-PC
Atomic Primitives

      Disclosed is a method to force application programs which use
POWER-PC atomic operations to loop instead of getting undefined
results upon referencing misaligned data.  This aids in debugging
such programs.

      The POWER-PC* architecture provides for user-mode atomic
primitives.  These come in the form of two, typically paired
instructions: 'lwarx' and 'stwcx'.  lwarx is typically used to load a
shared variable from storage, while stwcx is used to store back the
modified contents to that storage location if and only if, no other
program has modified that location in the interim.  Internally, lwarx
obtains a 'reservation', and stwcx will only complete if the
processor still has that reservation at the time of the stwcx.  Ways
that a reservation may be lost or cancelled, include:
  o  A normal store to the same coherency granule, or cache line
     occurs before the stwcx is executed.  This is a modification to
     the shared variable, thus it cancels the reservation.
  o  Another, unrelated stwcx is performed before the stwcx
     corresponding to the lwarx in question is.  There is only one
     reservation per processor, and no checking is done to verify
that
     a lwarx/stwcx pair operate on the same address.  lwarx simply
     obtains a reservation, while stwcx succeeds if the reservation
     still exists.  A lwarx to one address and a stwcx to another,
     would allow the stwcx to actually write its data to the
alternate
     address based on the lwarx reservation only.

      The stwcx instruction reports success or failure in the
condition register equal bit.  This is set if it successfully stored
the value, and reset if it did not.

      lwarx and stwcx are boundedly undefined in hardware when they
are passed a misaligned address to operate on.  Accidental misuse of
these primitives by users is anticipated in buggy programs.  Since
passing misaligned data can produce undefined values from these
primitives, it is useful to somehow, with little overhead, indicate
to the application that a bug has occurred in it, for debugging
purposes.

      Typical behaviour for various hardware implementations on lwarx
and stwcx with a misaligned operand is one of two things depending on
the situation:
  o  The lwarx will silently complete, loading garbage data from th...