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Multi-user Fullword Alignment Technique

IP.com Disclosure Number: IPCOM000113753D
Original Publication Date: 1994-Sep-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 100K

Publishing Venue

IBM

Related People

Carle, G: AUTHOR [+4]

Abstract

Adapters connecting to an ATM cell switching fabric must change the continuous stream of data received from a user into 53-byte ATM cells. This process involves only a single user during this segmentation process. However, as cells are received from the switching fabric destined for an end user, the adapter hardware must be capable of receiving cells from different users, stripping the unnecessary ATM parameters from the user data, and then reassembling the user data on a fullword memory boundary to be transferred to the user. The reassembly and alignment process can be complicated when receiving cells from a number of different users.

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Multi-user Fullword Alignment Technique

      Adapters connecting to an ATM cell switching fabric must change
the continuous stream of data received from a user into 53-byte ATM
cells.  This process involves only a single user during this
segmentation process.  However, as cells are received from the
switching fabric destined for an end user, the adapter hardware must
be capable of receiving cells from different users, stripping the
unnecessary ATM parameters from the user data, and then reassembling
the user data on a fullword memory boundary to be transferred to the
user.  The reassembly and alignment process can be complicated when
receiving cells from a number of different users.

      The current methods for aligning bytes on a fullword boundary
are to have a byte write accessible memory or to have the main
processor perform the byte alignments word-by-word.  Byte alignment
parameters vary from user to user since routing techniques must allow
for the deletion and insertion of a variable number of bytes.  The
state-of-the-art methods for performing the byte alignment for
different users is not sufficient to meet the performance
requirements for routing data in an ATM environment.  This disclosure
describes a means to minimize the amount of processor involvement
required in the reassembly process and also ensures messages are
properly aligned in the buffer memory for servicing.

      When ATM cells are received from the switching fabric from the
different users, the switch interface hardware works with the
picoprocessor to reassemble cells into messages.  The picoprocessor
manages the user cell reassembly tables.  To aide the picoprocessor,
a special break-in has been added to service short messages requiring
the use of only one cell.  The switch interface hardware also
services continuous cells from the same user without causing a
break-in to the picoprocessor.

      The Figure shows the data flow as cells for multiple users are
received in an ATM format from an internal switch.  Since the switch
interface is multi-user on the reception of cells from the switch,
the user of the current cell must be determined.  The Cell User
Register (CUR) is calculated from the cell ATM header and the User
Mask Register loaded by the picoprocessor.  Once the CUR is
determined, the "last cell" indication in the ATM header is checked
to determine if this cell is an "only" or "last" cell.  If this
indication is active, the by...