Browse Prior Art Database

Adapter Microcode Protection during Download

IP.com Disclosure Number: IPCOM000113828D
Original Publication Date: 1994-Oct-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 6 page(s) / 190K

Publishing Venue

IBM

Related People

Cook, SE: AUTHOR [+3]

Abstract

Disclosed is the use of two separate command processors, located in two different sections of an adapter Electrically Erasable Programmable Read Only Memory (EEPROM) module to allow recovery from the loss of electrical power or a system reboot occurring while the EEPROM is being updated. Without a provision of this kind, such an occurrence would result in a dead adapter card with no recovery process.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 40% of the total text.

Adapter Microcode Protection during Download

      Disclosed is the use of two separate command processors,
located in two different sections of an adapter Electrically Erasable
Programmable Read Only Memory (EEPROM) module to allow recovery from
the loss of electrical power or a system reboot occurring while the
EEPROM is being updated.  Without a provision of this kind, such an
occurrence would result in a dead adapter card with no recovery
process.

      A SCSI-2 adapter provides the user of a computing system with
the ability to upgrade the adapter EEPROM using a Download Microcode
Subsystem Control Block (SCB) command.  When this command is issued,
the adapter performs a DMA (Direct Memory Access) of a microcode
image from the system memory address specified in the SCB command,
sending this image to the memory of the adapter.  Then, microcode
running in RAM memory of the adapter burns the image into the EEPROM.
When the system is rebooted, the new content of the EEPROM is copied
into the RAM memory of the adapter.  Allowing the system user to
upgrade the adapter EEPROM in this way provides a simple way to apply
a field upgrade to the adapter for correcting a problem.  This method
eliminates the need to supply a replacement EEPROM, if the EEPROM is
mounted in a socket, or to replace the adapter card, if the EEPROM is
not mounted in a socket.

      Thus, the EEPROM used by the SCSI-2 adapter is divided into two
code sections, one of which holds the initial boot code, while the
other section holds the operational code.  Since each section can be
programmed separately, the operational code section can be updated as
the boot code is preserved.  The microcode of the adapter takes
advantage of this feature to allow recovery if a power loss or system
reboot occurs while the code section is being updated.

      This recovery is further accomplished through the use of two
separate command processors.  A complex command processor in the code
section handles all SCB commands, including the Download Microcode
command, and a basic command processor in the boot section handles
only the Download Microcode command.  When the portion of Power-On
Self-Test (POST) associated with the SCSI-2 adapter is run, the
checksum of the code section is calculated.  If this checksum is
correct, then the code section is copied into the RAM memory of the
adapter card, and control is given to the supervisor in the code
section.

      If a Download Microcode SCB command is received, the command
processor in the code section is invoked.  If the checksum is
incorrect the code section is not copied into the RAM memory of the
adapter card.  Instead, only the code that implements the Download
Microcode SCB command is copied from the boot section into adapter
RAM memory.  The POST routine then gives control to the supervisor in
the boot section of the adapter card.  This boot code supervisor is a
monitor which determines if an SCB command i...