Browse Prior Art Database

Simple Duplex System with Twin Tail Small Computer System Interface

IP.com Disclosure Number: IPCOM000114026D
Original Publication Date: 1994-Oct-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Kanetake, M: AUTHOR [+2]

Abstract

Disclosed is a duplex system that automatically switches its operation to a stand-by side at a failure in an operational side. The duplex system composed of a pair of usual simplex systems, and the bus of disk subsystem is directly connected each other for disk mirroring and a signal line is connected between the systems for heart-beat confirmation.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 67% of the total text.

Simple Duplex System with Twin Tail Small Computer System Interface

      Disclosed is a duplex system that automatically switches its
operation to a stand-by side at a failure in an operational side.
The duplex system composed of a pair of usual simplex systems, and
the bus of disk subsystem is directly connected each other for disk
mirroring and a signal line is connected between the systems for
heart-beat confirmation.

      A system used for System A1 and A2 in the Figure is a usual
simplex system.  The user application programs and most of the system
programs do not necessarily recognize that the system is duplex.  The
System A1, for example, is now operational, and writes the
application data into not only the disk X1 but also the disk X2
through the directly-connected (twin-tail) Small Computer System
Interface (SCSI) bus.  The operational system A1 is communicating
with other systems for application process via LAN and/or WAN
communication lines.  Both operational and stand-by systems are
separately connected to LAN physically.  WAN communication lines from
both are connected to the switch, but only the lines from operational
system are connected to external lines to other systems.

      The stand-by system A2 sends a state request periodically to A1
and receives an alive response in a defined time, via a line
connected to an Asynch communication adapter, for example.  At a
failure in an operational system, the system either cannot respond to
a s...