Browse Prior Art Database

Overflow Detection

IP.com Disclosure Number: IPCOM000114111D
Original Publication Date: 1994-Nov-01
Included in the Prior Art Database: 2005-Mar-27
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Getzlaff, KJ: AUTHOR [+3]

Abstract

Algebraic shift left instructions may cause program interruption if a fixed-point overflow is detected. An overflow condition happens if one or more bits unlike the sign bit are shifted out of the operand's most significant bit position (Bit 0, MSB). Usually system architectures define word and doubleword shifts, like SLA and SLDA instructions in IBM/390 Systems. Both instructions' second-operand address is not used to address data; its rightmost six bits indicate the number of bit positions to be shifted. The first operand which is shifted is treated as a 32/64 bit operand.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 57% of the total text.

Overflow Detection

      Algebraic shift left instructions may cause program
interruption if a fixed-point overflow is detected.  An overflow
condition happens if one or more bits unlike the sign bit are shifted
out of the operand's most significant bit position (Bit 0, MSB).
Usually system architectures define word and doubleword shifts, like
SLA and SLDA instructions in IBM/390 Systems.  Both instructions'
second-operand address is not used to address data; its rightmost six
bits indicate the number of bit positions to be shifted.  The first
operand which is shifted is treated as a 32/64 bit operand.

A former solution for SLA/SLDA overflow detection needs 3 cycles:
  1.  cycle: the operand is shifted left and stored
  2.  cycle: the operand is inverted if negative and the complement
of
       the shift amount is taken and stored
  3.  cycle: the resulting operand from cycle 2 is taken and shifted
       right with the complement shift amount.  If the result is not
       zero an overflow has happened.

      With the advent of very large scale integration wide busses and
wide control signals allow new features to increase performance.  A
general mechanism for a one cycle detection mechanism for fixed-point
overflow in algebraic shift operations is described.

      The shift amount (6 bits) is being decoded into a string S(i),
i=0..63.  The decoding of S is 64 to n, where n is the number of
positions from left to right being activ...