Browse Prior Art Database

Processor Chip Controller using a PS/2 and Parallel Port

IP.com Disclosure Number: IPCOM000114274D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 4 page(s) / 140K

Publishing Venue

IBM

Related People

Doing, RW: AUTHOR

Abstract

Described is a method for bring-up and control of a processor using a PS/2* personal computer and a parallel port. Full control of a processor is established which allows for simple debugging or extensive testcase execution and checking. The processor requires hardware support to accept simple commands through a parallel port interface and logic to route the information to and from registers and arrays. Any PS/2 that supports an extended mode (Bidirectional) parallel port can be used for the tool.

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This is the abbreviated version, containing approximately 41% of the total text.

Processor Chip Controller using a PS/2 and Parallel Port

      Described is a method for bring-up and control of a processor
using a PS/2* personal computer and a parallel port.  Full control of
a processor is established which allows for simple debugging or
extensive testcase execution and checking.  The processor requires
hardware support to accept simple commands through a parallel port
interface and logic to route the information to and from registers
and arrays.  Any PS/2 that supports an extended mode (Bidirectional)
parallel port can be used for the tool.

      The parallel port controller described here is depicted in Fig.
1.  A PS/2 is connected via a parallel port and cable to a processor
under test.  The processor is contained on a single chip and,
therefore, will often be referred to as the chip.  The parallel port
interface is comprised of an eight bit data bus and approximately
nine signal bits.  The data bus is Bidirectional (BIDI) and is used
to transfer data to and from the processor.  Four of the nine
available parallel port signal bits are used to control data on the
bus and to send commands to the processor.  Any PS/2 can be used as
the front-end driver of the tool as long as it has a parallel port
adapter that supports extended mode.  Extended mode allows the
parallel port to run as an input/output device (BIDI).  This mode is
setup at the beginning of each parallel port transaction by altering
the appropriate PS/2 POS facilities.

      Hardware on the processor side begins with a D-Shell connector
located on the card carrying the processor.  A parallel port cable is
used to connect the PS/2 to the card.  From there, the parallel port
signals (eight data bits and control signals) are routed into the
processor as inputs, outputs and BIDIs.  Logic in the chip is
triggered by unique sequences of control signals.  If a read or write
command is detected, the address is used to setup the data path to
the appropriate register or array.  The data on a write is collected
eight bits at a time in a sixty-four bit register.  Then the data is
transferred over to the appropriate facility.  A read command occurs
in the opposite manner as that of a write.  Data from a facility is
transferred into a sixty-four bit holding latch and is then broken
into eight-bit pieces and sent over the parallel port to the PS/2.

      Transactions over the parallel port are always started by the
PS/2.  A specific pattern of signals and appropriate data are placed
on the parallel port and picked up by the processor.  Each single
communication over the parallel port will be referred to as a
"command."  A group of commands that make up a function will be
referred to as a "transaction."  There is no error checking or retry
so once a transaction has been started by a command it will complete.

      The low-level interface between the PS/2 and processor is
designed as simple as possible to minimize the amount of l...