Browse Prior Art Database

Detection Mechanism between 386 or 486 Upgrade Processor Unit

IP.com Disclosure Number: IPCOM000114302D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Chan, FL: AUTHOR [+6]

Abstract

Disclosed is a device that floats the main processor, determines if an upgrade processor is installed and identifies what type of processor is running in a personal computer system with a processor upgrade socket. Note: 1. PWR_GOOD is driven active by Power Supply, Bus Interface Chip (BIC) drive its signals. 2. BIC samples CPU_HLDA high, no upgrade active. 3. BIC drives FLOAT_CPU# and CPU_HOLD high to detect main CPU type. 4. BIC samples CPU_HLDA low, 386 CPU is active in the system. 5. BIC drives CPU_486 and RESET low.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Detection Mechanism between 386 or 486 Upgrade Processor Unit

      Disclosed is a device that floats the main processor,
determines if an upgrade processor is installed and identifies what
type of processor is running in a personal computer system with a
processor upgrade socket.
  Note:
  1.  PWR_GOOD is driven active by Power Supply,
       Bus Interface Chip (BIC) drive its signals.
  2.  BIC samples CPU_HLDA high, no upgrade active.
  3.  BIC drives FLOAT_CPU# and CPU_HOLD high to detect main CPU
type.
  4.  BIC samples CPU_HLDA low, 386 CPU is active in the system.
  5.  BIC drives CPU_486 and RESET low.

      The main processor needs to be floated during Power On Reset
(POR) to detect the presence of an upgrade processor unit.  If the
upgrade processor is detected, the main processor is kept in the
FLOAT state and the support logic determines if the upgrade processor
has an Intel 386 or 486 interface.  If the upgrade processor is not
present, the support logic removes the FLOAT signal from the main
processor and detects its interface.

      After the application of power, the power supply drives all DC
power levels active for a minimum of 100ms before driving POWER_GOOD
active to the system.  When POWER_GOOD is sampled active, the Power
On support logic drives all RESET signals active high, CPU_HOLD and
FLOAT_CPU# low.  After 2msec, the support logic samples CPU_HLDA.
CPU_HLDA has a pull-up resistor in the board and it is used to detect
the prese...