Browse Prior Art Database

Small Multiply-Add Design

IP.com Disclosure Number: IPCOM000114315D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Brown, JD: AUTHOR [+3]

Abstract

Described is a method to reduce the the chip space required to implement a Multiply-Add (MADD) instruction using a multiply dataflow that consists of a 58-bit adder instead of a 108-bit adder.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 56% of the total text.

Small Multiply-Add Design

      Described is a method to reduce the the chip space required to
implement a Multiply-Add (MADD) instruction using a multiply dataflow
that consists of a 58-bit adder instead of a 108-bit adder.

      A MADD instruction is a 3 operand instruction that will
multiply 2 operands and add this product to the third operand.  In
hardware, additional chip area is required to implement a MADD
instruction.  This disclosure shows a method to reduce the the chip
space required to implement a MADD instruction using a multiply
dataflow that consists of a 58-bit adder.  This method reduces cost
for processor designs.

      Single chip processors can require a MADD instruction but find
the area expense is great, a 108-bit adder.  This method will use a
58-bit adder.  So a one-chip processor can include a Floating Point
Unit that implements MADD instructions without investing a large area
of the chip space.

      The following example is for a Floating Point Double MADD
instruction with a booth encoding multiplier.  The MADD instruction
is implemented in the hardware as A*C+D  where register FA holds
value A, FC holds value C, FA hold value D after the multiply is
finished.  FB holds intermediate values of the product A*C and
eventually the final result.

      The hardware, as shown in the Figure, performs the MADD in this
sequence.  The multiplier grabs the 3 least significant bits of FC to
use for booth encoding.  FA is encod...