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Method to Achieve Software-Transparency of PC-Bus Expansion Link during the PC Power-on-Self-Test Sequence

IP.com Disclosure Number: IPCOM000114328D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 4 page(s) / 156K

Publishing Venue

IBM

Related People

Sekiya, K: AUTHOR

Abstract

An AT-bus expansion link which provides a certain number of expansion slots additionally to a PC/AT compatible machine is discussed. The main objective of the link is that it becomes wholly transparent to both add-in cards used in the expansion slots and all software which access those cards. The link, however, must be initialized and set with information on resources installed in the expansion slots in advance to the utilization of those cards. Described is a method of hiding this initialization sequence at PC power-on time and preserving transparency of the link between the add-in cards and Power-on-Self-Test (POST) PC's boot program.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 33% of the total text.

Method to Achieve Software-Transparency of PC-Bus Expansion Link
during the PC Power-on-Self-Test Sequence

      An AT-bus expansion link which provides a certain number of
expansion slots additionally to a PC/AT compatible machine is
discussed.  The main objective of the link is that it becomes wholly
transparent to both add-in cards used in the expansion slots and all
software which access those cards.  The link, however, must be
initialized and set with information on resources installed in the
expansion slots in advance to the utilization of those cards.
Described is a method of hiding this initialization sequence at PC
power-on time and preserving transparency of the link between the
add-in cards and Power-on-Self-Test (POST) PC's boot program.

      General Explanation of the POST - On PC/AT compatible machines,
the POST scans the memory address from C0000h through C7FFFh in order
to detect whether there exists an add-in display card or not.  This
scan is done at the very beginning of the POST ("Early ROM scan").
In usual cases, the display subsystem on the PC system board occupies
the range.  In case a display card is installed in a slot, the card's
ROM is enabled at ROM address C0000h and the display subsystem on the
system board is disabled with a switch.

      At almost the end of the POST, it scans the memory address from
C8000h through DFFFFh to detect whether there are add-in cards which
must be initialized with their Feature ROM codes ("Secondary ROM
scan").

      Since the expansion link has its own Feature ROM to initialize
the link by itself, the link's ROM must be called before the ROM of
the add-in display card installed in the expansion slot.   As long as
all cards in the expansion slots are not display card and their ROM
can be relocated so that the first ROM range of the secondary ROM
scan, C8000h, can be reserved to the link's ROM, there is no problem.
But in the case where the ROM range is occupied by a card, the POST
becomes unable to access those cards placed before the link's ROM
address.  (The link's ROM cannot use C0000h ROM range because in this
case since the display subsystem in the PC system usually uses the
range.)  This is the first problem.

      Secondary, suppose a display card whose ROM occupies the first
ROM range, C0000h, is installed in the expansion slot, the POST
cannot access to the display card in the early ROM scan because the
link's ROM cannot be located before the address, hence, the link
cannot be initialized before the scan.  This is the second and the
severer problem.

The concept of the solution to the above problems is:
  1.  At the power-on time before the link's initialization, the
link's
       ROM occupies the ROM range which shall be occupied with an
add-in
       card's ROM in the expansion slot after the link's
initialization.
  2.  The link's ROM program initializes its link and disables its
ROM
       by itself.
  3.  Then t...