Browse Prior Art Database

Reducing Branch Determination Time with Counter "Look-Ahead"

IP.com Disclosure Number: IPCOM000114351D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 2 page(s) / 97K

Publishing Venue

IBM

Related People

Augsburg, VR: AUTHOR [+2]

Abstract

Disclosed is a method for making "early" branch determinations in order to reduce execution latency in a microprocessor incorporating branch with decrement operations, such as those described the IBM PowerPC* Architecture.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Reducing Branch Determination Time with Counter "Look-Ahead"

      Disclosed is a method for making "early" branch determinations
in order to reduce execution latency in a microprocessor
incorporating branch with decrement operations, such as those
described the IBM PowerPC* Architecture.

      Software uses branch instructions to change the flow of a
program.  As a result, microprocessor designs must incorporate a
mechanism for determining the direction (taken or not taken) of
branch operations, such that instruction fetching can continue down
the correct path.  Branch determination can take place once all
instructions ahead of the branch have completed updates to all
resources that participate in the branch direction determination.
Microprocessor architectures typically include a register that
contains conditions or flags that are set as a result of arithmetic
or other operations.  In addition, there is often a register that is
decremented each time the branch is executed.  The processor uses
these registers to determine if the branch is to be taken.

      In the IBM PPC403GA* embedded controller, branch instructions
may be dependent on a Condition Register (CR) bit value and/or a
Count Register (CTR) value which is functionally pre-decremented then
compared to zero for branch determination.  A problem was encountered
on this design when trying to determine the direction of a Branch
that Decrements and Uses the CTR (Branch with Decrement) when the
operation just prior to the branch instruction is also a Branch with
Decrement.  The problem is a result of the second branch relying not
only on its own CTR decrement, but also on the first branch's CTR
decrement, since the first branch must complete "architecturally"
before the second branch can take place.  Unless the first branch has
already updated the CTR resource at the time the second branch needs
to be determined, the second branch CANNOT be determined without
adding extra logic or extra cycles.  The PPC403GA solves the problem
by adding a minimum of hardware, as described later.

As further background for the solution, consider the following items:
  1.  Branch instructions in the PowerPC* Architecture that compare
the
       Count Register (CTR) to 0 as a condition, pre-decrement the
CTR
       before making the comparison/decision.
  2.  In the PPC403GA implementation of the instruction pipeline,
       branch direction (taken or not taken) is determined in the
decode
       (DCD) stage, which is two stages before the writeback (WB)
stage,
       where the CTR is actually...