Browse Prior Art Database

Direct Memory Access Protection for IEEE 1394 Link Layer Adapters

IP.com Disclosure Number: IPCOM000114374D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 4 page(s) / 148K

Publishing Venue

IBM

Related People

Chisholm, DR: AUTHOR [+2]

Abstract

Disclosed is a mechanism for memory protection which restricts IEEE 1394 Direct Memory Access (DMA) to only the initiator memory spaces that the initiator system allows.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 46% of the total text.

Direct Memory Access Protection for IEEE 1394 Link Layer Adapters

      Disclosed is a mechanism for memory protection which restricts
IEEE 1394 Direct Memory Access (DMA) to only the initiator memory
spaces that the initiator system allows.

      This invention relates to the IEEE 1394 High Performance Serial
Bus Standard, IEEE 1394/Draft 6.6v0, and to the ANSI Working Draft

X3T9.2-992D, SCSI-3 Serial Bus Protocol (hereafter simply referred to
as SBP).

      This 64-bit address format is used for IEEE 1394 destination
node addressing.  It allows 1023 bus addresses (bus #), 63 node
addresses (node #) on any one serial bus, and up to 256 terabytes of
addressable space within a node (node offset).

      SCSI-3 Serial Bus Protocol (SBP) describes a command and status
delivery protocol for controlling the operation of serial SCSI
devices attached to an IEEE 1394 High Performance Serial Bus.  This
protocol integrates the Parallel SCSI Command Descriptor Block (CDB)
within the Serial SCSI Command Data Structure (CDS).

      One important difference between Parallel SCSI and Serial SCSI
(as defined by SBP) is the redistribution of the system DMA context
handling from the initiator (as in Parallel SCSI) out to the target
devices (for SBP Serial SCSI).  That is, the target device is given
the role of DMA context maintenance.  Of course SBP can only take
advantage of this because of the IEEE 1394 serial bus addressing
architecture.

      In general, DMA context maintenance means that the target
devices get CDS blocks from initiators that not only contain imbedded
CDBs, but also contain initiator system addresses of where to get
data and other CDSs and where to send data and status.  SBP targets
move data in and out of initiator memory space using IEEE 1394 Read
Request and Write Request packets that have initiator memory
addresses as part of the destination address for these packets.  This
is a nice feature for SBP Serial SCSI initiator hardware because it
provides what is viewed as a design simplification.  That is, the
simplification of the initiator to being just a IEEE 1394 packet
router once initialization is complete.  However, it also raises the
concern of unwanted access from a IEEE 1394 agent to some parts of
system memory.

      This invention describes a mechanism that when implemented into
initiator hardware, restricts IEEE 1394 DMA access to only the
initiator memory spaces that the initiator system allows.  Fig. 2
shows a high level representation of this.

      In the hardware embodiment of this invention, the initiator's
IEEE 1394 link layer determines that the destination address of the
incoming packet is for this node by comparing its node ID with the
upper sixteen bits of the address.  When the packet is for this node,
the index pointer field selects one of the memory protection register
to be gated to one set of the compare logic's inputs.  A portion of
the low order thirty-two bits...