Browse Prior Art Database

High-Data-Rate Video Storage using Hard Disk Drives

IP.com Disclosure Number: IPCOM000114446D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 4 page(s) / 130K

Publishing Venue

IBM

Related People

Semba, T: AUTHOR

Abstract

Disclosed is a data storage system for reading and writing the signals of high data rate and long data length by using low-cost hard disk drives with a low data transfer rate. This system can also be used for the video storage in video-on-demand systems that have fast access and continuous data transfer of the video signals, even when there are many output terminals or the accesses from the terminals are concentrated on some program.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

High-Data-Rate Video Storage using Hard Disk Drives

      Disclosed is a data storage system for reading and writing the
signals of high data rate and long data length by using low-cost hard
disk drives with a low data transfer rate.  This system can also be
used for the video storage in video-on-demand systems that have fast
access and continuous data transfer of the video signals, even when
there are many output terminals or the accesses from the terminals
are concentrated on some program.

      Fig. 1 shows an embodiment of this method.  Eight-bit digital
video signals (113) with a data rate of 27MB/s are converted into
16-bit signals with a data rate of 13.5MB/s and stored in the buffer
memory (108).  The output of the buffer memory is sent to the
high-speed data bus (103).

      The hard disk drives are configured as a two-dimensional array
(121-126).  The interface bus (114) for each drive is separated into
the control signal bus (101) and the data signal bus (103) by a
switch (112) for each drive, so that while some drives are
transferring data, the others can perform command communication or
data access.  The data bus (103) runs at a higher constant frequency
than the maximum data transfer rate of the drives.

      Fig. 2 shows the timing of the control bus (101) and the data
bus (103).  Drives in the same array (121) read or write data
simultaneously.  Before transferring the data, the CPU (102) sends
read or write commands to all drives in the same array (121).  The
timing of the high-speed bus (103) is divided into nine timing slots
(this number is equal to the number of drives in the array).  Each
timing slot is occupied by the data of each drive in the array.  The
low-speed data of the nine drives are time-multiplexed by the bus
switch (112) and run through the high-speed bus (103).

      The data transfer timing of the drives in one array has to be
aligned as in Fig. 2.  The difference in the data transfer timing of
each drive and the difference between the data rate at the hard
disk's read/write head and at the high-speed bus (103) can be
absorbed by a look-ahead cache built into each drive.

      Data delay due to access delay or failure of the drive is
avoided by adding redundant driv...