Browse Prior Art Database

Release Interface Tape Programmable Probe Pad

IP.com Disclosure Number: IPCOM000114492D
Original Publication Date: 1994-Dec-01
Included in the Prior Art Database: 2005-Mar-28
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Bartley, GK: AUTHOR [+4]

Abstract

The use of Release Interface Tape (RIT) programmable probe pads in multi-chip modules is disclosed.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

Release Interface Tape Programmable Probe Pad

      The use of Release Interface Tape (RIT) programmable probe pads
in multi-chip modules is disclosed.

      A probe pad on a multi-chip module is a conductive pad on the
top surface of the module that is electrically connected to a signal
embedded in the module's chip-to-chip wiring.  It can be probed by
testers to check logic levels and driver parametrics of the signal.

      Use of RIT programmable probe pads allows customer/user to
specify which nets should have a testable probe point.  This probe
point is RIT programmable, and present only where required, thus
eliminating the need to place pads on all signals.  In addition, the
programmability allows for addition or deletion of access through the
Electronic Design System (EDS) RIT process, this reduces the number
of pads required for a given design thus reducing the space required
on the top surface, and the global capacitance introduced by routing
every I/O to a probe-pad as has been the practice in the past.

      In the design of high performance modules, delay must be
minimized.  There is also a drive to minimize the cost of the module
while maximizing the performance in "cost/performance" computer
systems such as the AS/400*.

      For other types of modules, probe pads are a requirement on
every module to allow the capability to do electrical experiments.
These types of chips also have high C4 I/O counts (up to 512) and
hence require one...