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High Efficiency Step Down DCDC Converter without an Inductor

IP.com Disclosure Number: IPCOM000114612D
Original Publication Date: 1995-Jan-01
Included in the Prior Art Database: 2005-Mar-29
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Andoh, H: AUTHOR

Abstract

In a step down DCDC converter, it is usually the case that the voltage difference between Vi,input voltage, and Vo,output voltage, is wasted away either through a dropper resistor or collector dissipation.

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High Efficiency Step Down DCDC Converter without an Inductor

      In a step down DCDC converter, it is usually the case that the
voltage difference between Vi,input voltage, and Vo,output voltage,
is
wasted away either through a dropper resistor or collector
dissipation.

      In this idea, in the first half cycle the input voltage will
drive the load and at the same time the voltage difference will
charge up the capacitor inserted between the input and output.  In
the second half cycle the input will be shut off from the circuit and
the charged capacitor will drive the load instead.  In this way all
the electrical energy given into the circuit from the input will be
efficiently used to drive the load.

      Circuit operation - In the following note, only one case where
Vref is equal to 1/2 Vi, is described, but it can easily be
applicable
for Vref= N/(N+1)*Vi, where N is any positive integer.

      The system is composed of 4 FET switches, 2 capacitors, one
comparator with some hysteresis, and two inverters to drive the 4 FET
switches as shown in Fig. 1.  In the first half cycle SW1, SW2 are ON
and SW3, SW4 are OFF.  The current will flow from Vi through SW1, C1,
SW2, and the load Rl, and the voltage across C1 and Cl will get
larger
as time goes by.  This is shown in Fig. 2.

      Then the second half cycle will start when Vo goes higher than
the reference voltage and the comparator shown in Fig. 3 flips to
make SW1 and SW2 OFF, and SW3 and SW...