Browse Prior Art Database

No DRAM Refresh for Video Adapter Card

IP.com Disclosure Number: IPCOM000114757D
Original Publication Date: 1995-Jan-01
Included in the Prior Art Database: 2005-Mar-29
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Kohda, Y: AUTHOR [+2]

Abstract

This disclosure is the usage of DRAM which doesn't have to run DRAM refresh cycle. When the DRAM is used as Video Memory which drives CRT display, DRAM refresh and CRT refresh is necessary. But if the CRT refresh can include the DRAM refresh, the CPU access cycle increases and DRAM refresh circuit can eliminate.

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This is the abbreviated version, containing approximately 100% of the total text.

No DRAM Refresh for Video Adapter Card

      This disclosure is the usage of DRAM which doesn't have to run
DRAM refresh cycle.  When the DRAM is used as Video Memory which
drives CRT display, DRAM refresh and CRT refresh is necessary.  But
if the CRT refresh can include the DRAM refresh, the CPU access cycle
increases and DRAM refresh circuit can eliminate.

      For example, when the CRT resolution is 1280Pixel x
1024(1pixel=8dot), its Horizontal Cycle is 81KHz(some 12.3us), its
Virtical Cycle is 77Hz (some 13ms) and the Frame buffer is 2Mbyte
(64K x 16Bit DRAM(*1)  x 16).  The Figure shows an example of address
map.

          *1 :  It has 8 bit address which are multiplexed by RAS/CAS
and its refresh rate is 256cycles/8ms.  And its random read/write
cycle is minimum 80ns.

      In this Figure all DRAM refresh can do in each block of
'a','b','c','d'.  And each DRAM refresh completes about 3.2ms(< 8ms).
Then CRT refresh can include the DRAM refresh.  As the result it is
possible that save about 32000 read/write cycle and eliminate the
DRAM refresh circuit.

This method is applicable to the combination of various DRAMs and CRT
displays.