Browse Prior Art Database

Programmable State Machine Macro

IP.com Disclosure Number: IPCOM000114840D
Original Publication Date: 1995-Feb-01
Included in the Prior Art Database: 2005-Mar-29
Document File: 4 page(s) / 89K

Publishing Venue

IBM

Related People

Brown, LM: AUTHOR

Abstract

State machines are often designed in a 'Classic' way. The process followed roughly the following steps: 1. Draw flow chart. 2. Write equations for each encoded bit. 3. Hand-minimize equations for each bit. 4. Implement minimized equations for each bit. 5. Decode output of register for current states.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Programmable State Machine Macro

      State machines are often designed in a 'Classic' way.  The
process followed roughly the following steps:
  1.  Draw flow chart.
  2.  Write equations for each encoded bit.
  3.  Hand-minimize equations for each bit.
  4.  Implement minimized equations for each bit.
  5.  Decode output of register for current states.

      Steps 2 and 3 are very tedious and difficult.  They are error
prone.  Errors made here are not easily found or fixed.  If changes
are to be made in the state machine function later (due to design
bugs or enhancements) all equations must be redone and
re-implemented.  Essentially, one must start all over, little of the
previous work is useful.

      This macro eliminates the problems of steps 2 and 3.  Any time
a change is necessary, only that piece of the programming needs to be
modified.  All the rest can remain as-is.  It also eases steps 4 and
5.  Essentially, one can progress from state 1 to programming as a
two step process.

      A significant added advantage of this macro is the built-in
error checking.  This checking checks both for bugs introduced in the
design of the programming logic and for flaws in the actual silicon.

      The Classic method of State Machine design does not exhibit the
following traits of this invention:
  o  Easy to translate Flow Chart to programming logic.
  o  Built in error checking of both physical hardware and next state
      programming.

      The invention is a logical macro with an input bus, output bus,
and an error_detected output signal.  Inside the macro is encoding
logic, error detection logic, storage logic, and decoding logic.

      The macro is used in a circuit design to implement a hardware
state machine.  The programming of the state machine is combinational
logic defining the signals on the input bus.  This combinational
logic personalizes the macro for a particular function.

The macro consists of 8 parts:
  1.  Input Bus.  1 line for each Next State.  Only 1 line in the bus
       is allowed to be a logi...