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Dual Storage Pipeline

IP.com Disclosure Number: IPCOM000114936D
Original Publication Date: 1995-Feb-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 79K

Publishing Venue


Related People

Christensen, NT: AUTHOR


A method of adding an additional control pipeline for improving store bandwidth in a storage hierarchy control function.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Dual Storage Pipeline

      A method of adding an additional control pipeline for improving
store bandwidth in a storage hierarchy control function.

      In a pipelined storage control function, as an operation (fetch
or store) many activities may be performed:  cache directory
array searches, and many address comparisons for the purpose of
proper sequencing of operations and data integrity.

      Most of the address comparisons are on a 'congruence class'
basis, as are Directory searches.  Store Protect searches are on a
'page' basis while configuration array searches are on a 'storage
increment' basis.  In terms of address bits used for each of these
operations, an example might be:
           Directory search - use address bits 12:23
           Address Compare  - use address bits  1:23
           Config Array     - use address bits  1:7
           Store Prot       - use address bits  1:19

      Because of the extremely large number of address compares
required for fetch-type operations, it is not feasible to use the
second pipeline for fetch traffic; otherwise, every compare site (of
which there could be hundreds) would need to duplicated.  Therefore,
the second pipe is reserved for Stores and Key ops (SSK, ISK, RRB)
only.  The reason for including key ops will be made clear shortly.
The fetch/store pipe will be called the FAR pipe, and the Store pipe
will be called the SAR pipe (Fetch Address Registers, and Store
Address Registers, respectively.)

      Since the purpose of the second pipe is to allow increased
store traffic, it must be determined on what basis to allocate stores
to each pipe.  This is done on an even page/odd page basis (on a
boundary of 4096 bytes); that is, if bit 19 of the store address is
'0', it will be granted be directed to the SAR pipe.  This
partitioning is chosen because the most important thing the store
operations do while in the pipeline is update the 'Reference' and
'Change' bits in t...