Browse Prior Art Database

System Restart Following PowerPC CPU Checkstop Condition

IP.com Disclosure Number: IPCOM000115015D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Curry, SE: AUTHOR [+3]

Abstract

Disclosed is a means to automatically reboot a PowerPC* system after the CPU has entered a CHECKSTOP condition.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

System Restart Following PowerPC CPU Checkstop Condition

      Disclosed is a means to automatically reboot a PowerPC* system
after the CPU has entered a CHECKSTOP condition.

      Once a PowerPC CPU has entered a CHECKSTOP condition, the
system is stopped.  A means is needed to automatically cause the
system to reboot after this condition arises.  This situation is
similar to an Intel** x86 processor-based system restarting after a
double-fault condition.

      The PowerPC CPU provides a CHECKSTOP pin.  This output pin is
asserted in the event a checkstop condition has been detected.  The
CPU is halted at this point and requires either a Power-On-Reset or
an HRESET_ to be asserted for a minimum of 300 processor bus clocks
to restart.

      The PowerPC system will drive CHECKSTOP_ into the PCI Bridge
and Memory Controller control chip ASIC.  The control chip has an
input pin (ALT_RESET_) used to trigger a soft reset (SRESET_) to the
CPU.  The SRESET_ output of the control chip will be sampled with
CHECKSTOP_ from the CPU to drive HRESET_ back into 601.  See the
Figure for a schematic.

      The control chip is not affected or reset by any signal other
than Power_Good/Reset_, and therefore will drive the SRESET_ for the
required 300 processor clock cycles.
   *  Trademark of IBM Corp.
  **  Trademark of Intel Corporation