Browse Prior Art Database

Programmable Split Terminator

IP.com Disclosure Number: IPCOM000115023D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Cao, T: AUTHOR [+5]

Abstract

A multiprocessor system uses multiple copies of the processor chip and the multiple copies of of the processor chip uses the same net to communicate with the support control chips. The net needs to be electrically terminated at both ends. One end is the single common control chip and the other end is the last processor chip connected to the multidrop bidrectional bus. The termination needs to appear only on the last processor chip but not on the other processor chips; however, strong economic requirements say that there should only one physical version of the processor chip which creates the problem solved by this invention.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Programmable Split Terminator

      A multiprocessor system uses multiple copies of the processor
chip and the multiple copies of of the processor chip uses the same
net to communicate with the support control chips.  The net needs to
be electrically terminated at both ends.  One end is the single
common control chip and the other end is the last processor chip
connected to the multidrop bidrectional bus.  The termination needs
to appear only on the last processor chip but not on the other
processor chips; however, strong economic requirements say that there
should only one physical version of the processor chip which creates
the problem solved by this invention.

      Fig. 1 explains the problem.  The terminator needs to be
electrically present only on processor chip 3 is in a standby mode
meaning processor chip is receiving but not transmitting.  The
terminator needs to be physically present on processor chip 1 and
processor chip 2 but should not appear electrically on the
bidirectional net.

      The solution provided by this invention is to put the
terminating resistors on the processor chips in a split fastion as
shown in Fig. 2.  The terminating resistance is formed by the
parallel computed value of R1 and R2 as shown in Fig. 2 connected in
series with driver output stage transistors.

      For terminating action to properly take place both R1 and R2
must be electrically visible to the net when the processor chip is in
standby mode.  This means that the two transistors in series with R1
and R2 must be turned on.  The control circuitry makes this happen
when i...