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Architected System Configuration Register Address Map for PowerPC 32-bit and 64-bit Systems that Have 6XX as System Bus

IP.com Disclosure Number: IPCOM000115062D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 160K

Publishing Venue

IBM

Related People

Cook, JA: AUTHOR [+3]

Abstract

Overview on the RISC/6000* PowerPC* Memory Map and the Upper 16 Mb of Architected System Memory Map - The System Memory Map in the PowerPC (32/64 bit) system architecture consists of n GB of real memory and can be shown on the left of the Fig. The Architected System Memory Space which is located in the upper 16 MB of the overall System Memory Map is expanded on the right of the figure below. Note that, for simplicity, the resolution of this figure is 1 MB.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Architected System Configuration Register Address Map for PowerPC
32-bit and 64-bit Systems that Have 6XX as System Bus

      Overview on the RISC/6000* PowerPC* Memory Map and the Upper 16
Mb of Architected System Memory Map - The System Memory Map in the
PowerPC (32/64 bit) system architecture consists of n GB of real
memory
and can be shown on the left of the Fig.  The Architected System
Memory
Space which is located in the upper 16 MB of the overall System
Memory
Map is expanded on the right of the figure below.  Note that, for
simplicity, the resolution of this figure is 1 MB.

      Table 1 contains more details regarding the layout, the
descriptions, and the specific ranges of addresses in the 16 MB of
Architected System Memory Space.  All items identified as
"Architected" must be supported by all RISC/6000 products unless
specifically identified as optional under the details regarding the
specific facility.

      Bring-Up and Configuration Architecture Overview - The PowerPC
system design defines the architected interfaces among the set of
processors, memory cards, I/O adapters, and other components during
the system configuration.  System configuration is an integral part
of the Initial Program Load (IPL) Process, and may be re-run after
IPL in response to new conditions.

      The primary purpose of the Bring-Up and Configuration
Architecture is to define the interface between hardware and software
that allows software to identify and set up (configure) each variable
component of the system.  The configuration software uses the
component identification to allocate system resources (e.g., address
space, interrupt levels, etc...) to the component and communicates
these allocations to the component and/or its controlling software.
The Bring-Up and Configuration Architecture defines the elements that
are common to components, the method of identifying each component,
and the methods of communicating with it.  Due to a legacy of system
components, the architecture allows for components which do not
implement the optimal configuration functionality.  Those component
designs that do not incorporate the required features specified in
this document require approval as architectural deviations and risk
additional development expense as well as extended time to market.
  o  All I/O adapters shall have adapter specific functionality
      defined in ROM on the adapter.  There are many reasons for
this.
      Among them are the following:
  o  The system IPL ROM will not need to keep adapter specific
      contents.
  o  Boot device and display device supported by IPL ROM are
      simplified.
  o  AIX displa...