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Switching of a PowerPC 601 System from Big-Endian to Little-Endian

IP.com Disclosure Number: IPCOM000115091D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Carpenter, GD: AUTHOR [+3]

Abstract

Disclosed is a means to switch a PowerPC 601* system from Big-Endian to Little-Endian mode.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

Switching of a PowerPC 601 System from Big-Endian to Little-Endian

      Disclosed is a means to switch a PowerPC 601* system from
Big-Endian to Little-Endian mode.

      The PowerPC 601 processor powers on in Big-Endian mode.
However, some operating systems require processors to operate in
Little-Endian mode.  Therefore, a means to switch the processor to
the proper Endian mode is needed.  The following sequence will switch
the 601 processor from Big-Endian to Little-Endian mode.

      If the cache has been enabled, it must first be disabled and
flushed.  All interrupts should be disabled until the switch from
Big-Endian to Little-Endian has been made.  Then, the following code
sequence should be executed:
  mfspr  r2,1008        #Read the HID 0 register
  addi   r3,0,0x0008    #Load register 2 with the HID 0 value that
will
                          place the
  or     r2,r2,r3       #601 in Little-Endian mode
  addi   r6,0,0x92      #Read port 92 which includes bit that
controls
                          planar
  oris   r6,0x8000      #Endian mode
  lbz    r5,0(r6)       #Load register 5 with port 92 value to place
  ori    r5,r5,0x02     #PowerPC 601 planar in Little-Endian mode
  addi   r6,0,0x95      #Load register 6 with address of port 92 when
                         601 is
  oris   r6,r6,0x8000   #in Little-Endian and planar is in Big-Endian
                         mode
  sync                  #Purge the instruction buffers
  sync
  mtspr  1008,r2 ...