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Architected Configuration Facilities for RISC/6000 PowerPC 32-bit/64bit Systems that have 6CC-MXX as System Bus

IP.com Disclosure Number: IPCOM000115124D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 186K

Publishing Venue

IBM

Related People

Hanna, JT: AUTHOR [+2]

Abstract

Bring-Up and Configuration Architecture Overview - The PowerPC* system design defines the architected interfaces among the set of processors, memory cards, I/O adapters, and other components during the system configuration. System configuration is an integral part of the Initial Program Load (IPL) Process, and may be re-run after IPL in response to new conditions.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 39% of the total text.

Architected Configuration Facilities for RISC/6000 PowerPC 32-bit/64bit
Systems that have 6CC-MXX as System Bus

      Bring-Up and Configuration Architecture Overview - The PowerPC*
system design defines the architected interfaces among the set of
processors, memory cards, I/O adapters, and other components during
the system configuration.  System configuration is an integral part
of the Initial Program Load (IPL) Process, and may be re-run after
IPL in response to new conditions.

      The primary purpose of the Bring-Up and Configuration
Architecture is to define the interface between hardware and software
that allows software to identify and set up (configure) each variable
component of the system.  The configuration software uses the
component identification to allocate system resources (e.g., address
space, interrupt levels, etc...) to the component and communicates
these allocations to the component and/or its controlling software.
The Bring-Up and Configuration Architecture defines the elements that
are common to components, the method of identifying each component,
and the methods of communicating with it.  Due to a legacy of system
components, the architecture allows for components which do not
implement the optimal configuration functionality.  Those component
designs that do not incorporate the required features specified in
this document require approval as architectural deviations and risk
additional development expense as well as extended time to market.

      All I/O adapters shall have adapter specific functionality
defined in ROM on the adapter.  There are many reasons for this.
Among them are the following:
  o  The system IPL ROM will not need to keep adapter specific
      contents.
  o  Boot device and display device supported by IPL ROM are
      simplified.
  o  AIX* display and bosboot diskettes will not need to keep adapter
      specific contents.
  o  VLSI and ASIC parts should not have to have adapter level
      personality hardwired and/or built into them (such as adapter
ID
      values); but instead, should extract these values from a ROM.
  o  Features and adapters which are not I/O devices must follow a
      common configuration architecture along with the I/O devices.
      The architecture permits ample flexibility for implementation
      details.

      The configuration address space is contained within the last 16
Megabytes of physical address space of the system.  On a 64-bit
system, software addresses these real addresses by assuring that the
upper 32 bits of address are all one's.  Included in this16 Megabyte
address space are the registers for system control (e.g.,  the
Pseudo-complete Connectivity Reset registers, the Pseudo-complete
Connectivity Configuration register,...), the architected registers
for device configuration, the architected System Interrupt registers,
the SMP Available Processors registers, the SMP Power...