Browse Prior Art Database

Dynamic Hardware Trace

IP.com Disclosure Number: IPCOM000115209D
Original Publication Date: 1995-Mar-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Easter, RJ: AUTHOR

Abstract

Disclosed is a method to enable dynamic hardware trace input selection during instruction execution. This information is desirable for problem determination and debug. As complexity and density of logic on a chip increases, the number of signals that are of interest to trace increases. The method described decreases hardware trace array requirements while providing pertinent hardware instruction trace information. This concept can be applied to any hardware trace implementation where large numbers of traced input lines are desired, yet circuit real estate is constrained in VLSI environments.

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This is the abbreviated version, containing approximately 53% of the total text.

Dynamic Hardware Trace

      Disclosed is a method to enable dynamic hardware trace input
selection during instruction execution.  This information is
desirable for problem determination and debug.  As complexity and
density of logic on a chip increases, the number of signals that are
of interest to trace increases.  The method described decreases
hardware trace array requirements while providing pertinent hardware
instruction trace information.  This concept can be applied to any
hardware trace implementation where large numbers of traced input
lines are desired, yet circuit real estate is constrained in VLSI
environments.

      To minimize the real estate involved with trace arrays,
consider that of all the signals traced at any given time, depending
upon what is being executed, only a subset of those signals are of
interest.  Therefore for any given operation, only a subset of
signals need be traced.  Rather than implementing enough trace arrays
to trace ALL signals, one small array is implemented that is
dynamically configured based on what is being executed and only that
subset of signals traced.  As operations change, different sets of
signals are traced.

As shown in the Figure, the components of the dynamic hardware trace
logic are:
  o  MODE Register - This register indicates what mode the dynamic
      trace array configuration is in.  One could select the normal
      'dynamic' setting or force the trace to be fixed on a
particular
  ...