Browse Prior Art Database

On-Chip Spare Wiring Grid

IP.com Disclosure Number: IPCOM000115228D
Original Publication Date: 1995-Apr-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Cowan, MD: AUTHOR [+4]

Abstract

A method for using a spare wiring grid to aid in design modifications of chips is described. This grid is added above the final chip wiring. When chip wiring changes are required, the grid is cut into proper sized pieces and attached to the chip wiring at appropriate points using a Focused Ion Beam or other micromachining system.

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This is the abbreviated version, containing approximately 100% of the total text.

On-Chip Spare Wiring Grid

      A method for using a spare wiring grid to aid in design
modifications of chips is described.  This grid is added above the
final chip wiring.  When chip wiring changes are required, the grid
is cut into proper sized pieces and attached to the chip wiring at
appropriate points using a Focused Ion Beam or other micromachining
system.

      A grid of wires is added to a completed chip above the final
wiring level, but not in electrical contact to it.  The grid can be
added in the final passivation or above it, then passivated.  For
flip-chip technology, the grid of wires would go between the solder
balls.  When changes need to be made to the wiring to alter the
design or function of the chip, this grid can be cut into pieces and
attached to the usual chip wiring at the proper spots using a Focused
Ion Beam, laser, or other micromaching tool.  By extension, multiple
levels or multiple X or Y grids can be used as desired to increase
the flexibility of the spare wiring system.