Browse Prior Art Database

Dynamic Memory Size Determination Algorithm

IP.com Disclosure Number: IPCOM000115269D
Original Publication Date: 1995-Apr-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 8 page(s) / 305K

Publishing Venue

IBM

Related People

Bass, BM: AUTHOR [+5]

Abstract

All computer systems have some kind of memory interface. The memory controller for a system must know the size and quantity of memory in the system in order to operate correctly. Traditionally this information has been hard wired on the system board or hard coded in software, both of which have their disadvantages. Described is an algorithm that permits software to dynamically determine the size and quantity of memory in the system.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 24% of the total text.

Dynamic Memory Size Determination Algorithm

      All computer systems have some kind of memory interface.  The
memory controller for a system must know the size and quantity of
memory in the system in order to operate correctly.  Traditionally
this information has been hard wired on the system board or hard
coded in software, both of which have their disadvantages.  Described
is an algorithm that permits software to dynamically determine the
size and quantity of memory in the system.

      This algorithm solves the problem of dynamically determining
the size of memory in a system with software.  The only functions the
memory controller provides is the ability to read and write specified
memory locations, and the ability to specify in the memory controller
what size of memory (both number of banks and the size of each bank)
is present in the system.  This memory size specification within the
memory controller is what allows the controller to place the correct
address on the memory address bus and control the memory correctly.
The memory controller itself has no other way of determining the size
of memory in the system.  Therefore, the software must determine the
size of the memory in the system by writing and reading locations in
memory with different memory size settings being specified in the
memory controller.

      There are two parts to this solution.  The first is to
determine the memory locations that are to be written to and read.
Second is the method to determine the actual size of the memory that
is present by writing and reading the selected locations while
changing the specified size setting within memory controller.

      The concept used by this algorithm to determine the size of
memory that is present in a computer system is illustrated by the
example in Fig. 1.  Here a generic system address bus and memory
address bus is shown.  It is assumed that the memory address bus is
12 bits long.  Therefore, the largest number of addressable memory
locations is 4096.  Assume that only two sizes of memory banks can be
addressed by the memory controller:  11 and 12-bit addressed banks.

      The algorithm always starts out assuming that the size of
memory that is available is the largest, in this case a 12-bit
addressed memory device.  The software indicates to the memory
controller that the current memory bank is a 12-bit addressed memory
bank.  This results in the memory controller functioning as if the
actual memory present is a 12-bit addressed device, whether it is or
not.

      Multiple memory locations are then chosen to be written to,
such that if the actual memory present is smaller than what was
specified to the memory controller, an actual physical location in
the memory device will be written to multiple times.  This is done by
first selecting a base address that can be written to in the smallest
device and for each larger device, select an address that would
result in the base addr...