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Selective Metal Deposition for Microanalysis of Electronic Packaging Hardware

IP.com Disclosure Number: IPCOM000115274D
Original Publication Date: 1995-Apr-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Doscher, MJ: AUTHOR [+2]

Abstract

Electronic packages utilize conductive circuit paths inside a matrix of ceramic and/or polymer insulating material. Electrical power and signal input/output for devices mounted on the package is accomplished through connections to discrete pads on the surface of the package. These connections may include, for example, solder and ultrasonic bonds. The yield and reliability of the bonds is extremely dependent on the cleanliness of the pad surface. Any contamination present on the pads can have detrimental effects.

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This is the abbreviated version, containing approximately 52% of the total text.

Selective Metal Deposition for Microanalysis of Electronic Packaging
Hardware

      Electronic packages utilize conductive circuit paths inside a
matrix of ceramic and/or polymer insulating material.  Electrical
power and signal input/output for devices mounted on the package is
accomplished through connections to discrete pads on the surface of
the package.  These connections may include, for example, solder and
ultrasonic bonds.  The yield and reliability of the bonds is
extremely dependent on the cleanliness of the pad surface.  Any
contamination present on the pads can have detrimental effects.

      While trouble-shooting problems with the bonding processes, it
is very useful to apply surface analysis techniques to the discrete
pads.  Some of these techniques (Auger, ESCA) involve analyzing the
energy of certain electrons emitted from the sample.  Since electrons
are charged particles, their energy can be influenced by electric
fields.  It is therefore essential that any charging of the sample be
avoided.  It is also extremely important to avoid altering the
chemistry of the surface (pad) to be analyzed.

      With the miniaturization occurring in electronics, the
dimensions of the discrete pads on the surface are rapidly shrinking.
As a result, it becomes very difficult to attempt surface analysis on
a very small discrete pad surrounded by an insulator, without
introducing some charging (i.e., electric field) to the sample.  In
some cases, an ultrathin layer of metal is evaporated or sputter
coated onto the entire sample to prevent the charging.  However, this
approach has its drawbacks, the primary one being that it may alter
the chemistry of the surface to be analyzed.

      Disclosed is a technique which makes it possible to do surface
analysis of a discrete metallic pad surrounded by insulating
material.  A thin conductive coating is selectively deposited on the
surface of the specimen, leaving the area chosen for surface analysis
uncoated.  Any one of a variety of metals or carbon...