Browse Prior Art Database

Simple Scheme to Eliminate Speed Paths in a Pipelined Floating Point Unit

IP.com Disclosure Number: IPCOM000115353D
Original Publication Date: 1995-Apr-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Burchfiel, SM: AUTHOR [+3]

Abstract

On high-performance processors, it is necessary to optimize for the most frequently used instruction(s). This invention illustrates a means to optimize the most used instructions while maintaining the pipelined nature of the unit.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 91% of the total text.

Simple Scheme to Eliminate Speed Paths in a Pipelined Floating Point
Unit

      On high-performance processors, it is necessary to optimize for
the most frequently used instruction(s).  This invention illustrates
a means to optimize the most used instructions while maintaining the
pipelined nature of the unit.

      Most pipeline schemes require all instructions to execute (in
any particular pipeline stage) at the speed that the slowest
instruction can execute.  As pipelines are forced to implement more
logic functions per stage in an ever decreasing timing cycle,
differentiations will have to be made between instructions to
accommodate those instructions with the higher demands.  Stalling the
pipeline for these special instructions is not desirable since state
information must be held in many places.

      A quick and efficient way to solve this problem involves
launching two versions of the slow instruction into the execution
pipeline on consecutive cycles.  The first version of the instruction
will perform most of the logic function while the second version of
the instruction can finish the instruction execution by utilizing the
information that the first instruction generated (in the stage
directly following) and compute exceptions and other values to
complete the instruction.  This is particularly useful for
instructions that are rarely used and the pipeline is not optimized
to execute.

      This scheme allows the pipeline to be optimized for t...