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Micro Channel Architecture for Real-Time Multimedia

IP.com Disclosure Number: IPCOM000115391D
Original Publication Date: 1995-Apr-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 257K

Publishing Venue

IBM

Related People

Kirk, DB: AUTHOR [+3]

Abstract

Audio and video are perceived as changing continuously over time and are called continuous media. Thus, the times at which the digital representations of audio and video signals are transmitted to speakers and display monitors respectively is fundamental to the definition and quality of the corresponding signals. In other words, continuous media data must be treated as real-time data with associated timing constraints.

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Micro Channel Architecture for Real-Time Multimedia

      Audio and video are perceived as changing continuously over
time and are called continuous media.  Thus, the times at which the
digital representations of audio and video signals are transmitted to
speakers and display monitors respectively is fundamental to the
definition and quality of the corresponding signals.  In other words,
continuous media data must be treated as real-time data with
associated timing constraints.

      Due to the abundance of Micro Channel* adapters currently on
the market, it would be devastating to change the architecture in a
way which would make the new version of the Micro Channel
incompatible with these adapters.  Therefore, it has been a goal to
define a mechanism to provide full support for time-constrained
multimedia and real-time applications while remaining fully
compatible with the existing adapters.  This is not to say that we
expect the current adapters to be able to support these real-time
features.  However, any current adapter inserted into the new
architecture should still function as it does today.  In addition, it
should be possible to design new adapters which function both in
real-time environments as well as under the current architecture
definition.

      The original Micro Channel architecture defined 7 signal lines
associated with bus arbitration.  It was intended that these lines be
shared by all adapters and that distributed arbitration would be
performed.  These 7 lines include 4 for the Arbitration Level, 1 for
indicating the arbitration/grant state, 1 for Preempt (which is used
for making bus requests), and 1 for indicating that the Burst mode
will be used (block transfer).  All arbitrating devices share the
control and monitoring of these signals.

      The principal difference between the original Micro Channel
Architecture and the proposed real-time Micro Channel is the
introduction of a central arbiter which decides the arbitration
winner.  In addition this central arbiter, shown in Fig. 1, provides
the following support for priority-based scheduling: 256 arbitration
priority levels; a mechanism to resolve ties for bus requests with
identical priorities; dynamic arbitration level selection to reflect
the priority of the data or task generating the bus request; and a
priority-based preemption scheme.  Other functions provided by this
central arbiter (not related to priority-based scheduling support)
include: echoing arbitration bus activity to the DMA Controller; and
implementing the fairness feature for environments which are not
time-critical.

      The central arbiter, shown in Fig. 1, provides full support for
the priority-based scheduling algorithms which can guarantee reliable
continuous media presentation.  The arbiter chip consists of sixteen
7-line interface ports, one (or more) of which is dedicated to the
DMA controller.  Each of the other fifteen interface ports are
dedicated to...