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Power-Lock Circuit for Personal Computers having Power-Loss Sensitive Operating Systems

IP.com Disclosure Number: IPCOM000115420D
Original Publication Date: 1995-May-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Haller, KL: AUTHOR [+2]

Abstract

A method is described to deactivate the turn-off capability of a computer on-off power switch until proper shut-down of the operating system software is completed. This solves the problem of destruction of some multi-tasking operating system software by premature power switch shut-off.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Power-Lock Circuit for Personal Computers having Power-Loss Sensitive
Operating Systems

      A method is described to deactivate the turn-off capability of
a computer on-off power switch until proper shut-down of the
operating system software is completed.  This solves the problem of
destruction of some multi-tasking operating system software by
premature power switch shut-off.

      Block diagram, Fig. 1, shows the major addition required to
implement this new system control as block 2, comprised of a power
lock circuit A, an interface register B, and battery power and
charging circuit C.  Block 4, an AC line relay, is also a required
addition.

      To start operation of the system from the power off state,
external pushbutton power switch 6 is pressed.  Power-lock circuit 2A
and interface register 2B are maintained in an active state by
battery power from block 2C.  Closure of switch 6 is detected by
circuit 2A.  AC power relay 4 is closed, thereby supplying AC power
to DC power supply 8.  DC power is also supplied to computing system
10 via DC power lines DCL.  During such a cold start operation,
switch 6 remains active through such programming steps as diagnostics
unless the start-up programming specifically locks in system power.

      Once the operating system begins loading from the system mass
storage, the operating system software sets a lock bit in interface
register 2B (shown in more detail in Fig. 2).  Setting this bit
disables switch 6.  Power cannot be removed from the system except by
physically interrupting AC power, e.g., by pulling plug 12.  Fig. 1
shows interconnection between system 10 and register 2B on bus 14,
e.g., the microchannel bus in certain IBM computers.

      If switch 6 is pressed while the system is running, power lock
circuit 2A sets the register 2B Error Bits shown in Fig. 2 or
generates a system interrupt on the system bus.  The operating system
may then decode the error bits and display an appro...