Browse Prior Art Database

Dynamic Comparator with Data Selftiming

IP.com Disclosure Number: IPCOM000115476D
Original Publication Date: 1995-May-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Hoover, KJ: AUTHOR

Abstract

Disclosed is a CMOS dynamic comparator circuit that eliminates the need for a timing signal to qualify the input data when two RAM arrays are compared. The need for a timing signal is eliminated by timing the comparison off the input data itself.

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This is the abbreviated version, containing approximately 52% of the total text.

Dynamic Comparator with Data Selftiming

      Disclosed is a CMOS dynamic comparator circuit that eliminates
the need for a timing signal to qualify the input data when two RAM
arrays are compared.  The need for a timing signal is eliminated by
timing the comparison off the input data itself.

      A comparator for two N-bit values can be implemented with N
2-input XOR gates and one N-bit dynamic NOR function.  To do a
comparison, each of the N-bits from the two inputs are connected to
the 2-input XOR gates.  The outputs of the XOR gates feed into the
N-bit NOR gate.  A dynamic NOR can be implemented using one pmos
precharge device and N nmos pulldown devices connected to a signal
node called MATCH as shown in the Figure.

      Because the MATCH signal is dynamic, the inputs to the nmos
pulldowns must be stable when the pmos precharge device is turned
off, or the MATCH signal could be erroneously discharged.  However,
if these signals are not stable, the standard practice would be to
gate the signals with a qualifying signal.  This comparator uses a
dynamic XOR gate that takes advantage of the precharged state and
transition of RAM array outputs to time the comparison.  Because the
comparison timing is dependent on the data and not an independant
qualifying signal, the risk of a timing mismatch is eliminated.  In
addition, a faster comparison can be realized because extra margin
does not have to be built into a qualifying signal.  Also, the
comparison is timed off of both sets of input data eliminating the
need to know the relative speed...