Browse Prior Art Database

Direct Registers Access

IP.com Disclosure Number: IPCOM000115546D
Original Publication Date: 1995-May-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Ho, WJ: AUTHOR

Abstract

Microcode needs quite a few instructions to program the hardware to do certain functions. The number of instructions used in the microcode (path length) play a critical role in the total system performance. To initiate a hardware function, microcode needs to get the address of register/memory and the data pattern, then do a write instruction. It takes a minimum of three instructions to handle one register initialization. The same thing happens when the microcode needs to check the result/status. If the three instructions could be combined into one, then the system performance could be tripled. The question is how to combine three steps into one.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 81% of the total text.

Direct Registers Access

      Microcode needs quite a few instructions to program the
hardware to do certain functions.  The number of instructions used in
the microcode (path length) play a critical role in the total system
performance.  To initiate a hardware function, microcode needs to get
the address of register/memory and the data pattern, then do a write
instruction.  It takes a minimum of three instructions to handle one
register initialization.  The same thing happens when the microcode
needs to check the result/status.  If the three instructions could be
combined into one, then the system performance could be tripled.  The
question is how to combine three steps into one.

The solution is to make two special instructions in the processor:
  1.  INIT - This instruction will have one operand to specify the NI
       (number of register/memory location to be initialized).  The
       assembler or compiler will put the (address, data) pair of
every
       register/memory location(s) adjacent to the machine code of
the
       INIT instruction one after another.
  2.  COMP - This instruction will have one operand to specify the
       number of register/memory location(s) to be compared.  The
       assembler or compiler will do the same as previous one.

      When the processor decodes the machine code, and the operand
and sees that the INIT instruction is requested, in the next clock,
it will issue a write operati...