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Browse Prior Art Database

60x Bus-to-PCI Bridge

IP.com Disclosure Number: IPCOM000115547D
Original Publication Date: 1995-May-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 73K

Publishing Venue

IBM

Related People

Bui, HQ: AUTHOR [+7]

Abstract

Disclosed is a device that provides an interface from PowerPC* 60x processors (PowerPC 601*, PowerPC 603*, and PowerPC 604* processors and their derivatives) to an industry standard PCI bus.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

60x Bus-to-PCI Bridge

      Disclosed is a device that provides an interface from PowerPC*
60x processors (PowerPC 601*, PowerPC 603*, and PowerPC 604*
processors and their derivatives) to an industry standard PCI bus.

      The PowerPC 60x bus is a unique processor bus, and no industry
standard adapters are available to drive I/O devices.  The PCI bus
provides a standard interface that has attracted many vendors to
design
low-cost device adapters.  A means to interface the two is needed.

      The invention disclosed provides a means for 60x processors to
interface to the PCI bus and thereby gain access to low-cost
peripheral adapters.  The Figure shows the design of the desktop
PowerPC system.  The control chip and buffer chip comprise the
60x-PCI bridge as well as the system memory controller.  These two
blocks represent the two new ASICs and are the key elements in the
desktop PowerPC design.  The major functions of the 60x bus-to-PCI
bridge are:
  o  To map the processor bus cycles to
     -  System memory
     -  PCI bus memory cycles
     -  PCI bus I/O cycles
     -  PCI bus interrupt acknowledge cycles
  o  To detect memory-mapped I/O cycles of the 601 bus and adjust the
      address mapping so that the standard ISA addresses are
produced.
  o  To route the data on the appropriate byte lanes to take care of
      the "Big-Endian/Little-Endian" differences between the I/O and
      the processor.  This is done mainly by the buffer chip.
  o  To "unmunge" the three low-order address bits as a part of the
     ...