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Simplified Protect Diode Scheme for Chips with Mixed Voltage Interfaces

IP.com Disclosure Number: IPCOM000115564D
Original Publication Date: 1995-May-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 123K

Publishing Venue

IBM

Related People

Correale Jr, A: AUTHOR

Abstract

Electro-Static Discharge (ESD) protection schemes require that diodes be connected between each chip pin/pad and the circuits power supplies. Typically, a diode is connected such that it is reversed biased during normal operation but will become forward biased and conductive to provide a shunt path for ESD. When mixed power supply interfaces are required, i.e., a 3-volt device is expected to communicate with a 5-volt device, the use of a single diode between the pin and the power supply is often replaced with a series string of diodes. This configuration provides for proper functional operation at the sacrifice of silicon area and overall ESD performance. With the continued scaling of technology, ESD protection is becoming more complex.

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Simplified Protect Diode Scheme for Chips with Mixed Voltage Interfaces

      Electro-Static Discharge (ESD) protection schemes require that
diodes be connected between each chip pin/pad and the circuits power
supplies.  Typically, a diode is connected such that it is reversed
biased during normal operation but will become forward biased and
conductive to provide a shunt path for ESD.  When mixed power supply
interfaces are required, i.e., a 3-volt device is expected to
communicate with a 5-volt device, the use of a single diode between
the pin and the power supply is often replaced with a series string
of diodes.  This configuration provides for proper functional
operation at the sacrifice of silicon area and overall ESD
performance.  With the continued scaling of technology, ESD
protection is becoming more complex.  This disclosure demonstrates a
very simple technique wherein a single area efficient diode can be
employed to satisfy both the functional interface requirements and
provide ESD protection.

      A typical input pin and associated protect diode configuration
for a single voltage interface is illustrated in Fig. 1.  The ESD
protection is comprised of a pair of diodes: one connected between
the input pin and ground; the other connected between the input pin
and the 3-volt power supply.  The diode connected to ground provides
for a shunt path for negative ESD pulses while the diode connected to
the power supply provides a shunt path for positive ESD pulses.
Since the upper diode is connected to the 3-volt supply, the input
level cannot rise above 3-volts by more than one diode drop, Vd,
typically 0.5 to 0.7 volts before forward conduction occurs.  This
implies that the maximum input that can be supplied to the device is
3.5 volts.  To allow a 5-volt device to drive the input of this chip
the diode configuration must be changed.  To allow for a 2 volt over
bias condition (5-volts minus 2-volts) at least 4 series diodes
(assuming a 0.5-volt Vd) must be employed.  This is illustrated in
Fig. 2.  Since these diodes must be capable of shunting very high
current their physical dimensions are also very large.  Typically,
the area of a single protect diode is on the order of 20% of the area
of an Off Chip Driver.  The use of multiple series diodes increases
the area required for protection dramatically.  Since I/O regions
(pads, protect devices, Off Chip Drivers and receivers) occupy nearly
20 - 30% of the total chip area, area efficiency in the protection
diodes is...